[coreboot-gerrit] New patch to review for coreboot: intel/amenia: keep ISH enabled for now

Lijian Zhao (lijian.zhao@intel.com) gerrit at coreboot.org
Wed Jun 29 19:58:39 CEST 2016


Lijian Zhao (lijian.zhao at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15497

-gerrit

commit 98f79223491a46c1204a8dd275b78d423c5662c4
Author: Zhao, Lijian <lijian.zhao at intel.com>
Date:   Tue Jun 28 11:34:29 2016 -0700

    intel/amenia: keep ISH enabled for now
    
    Disable ISH causes reset in FSP, this should be fixed in later stepping,
    util then keep ISH enabled.
    
    BUG= None
    TEST=Boot up into OS
    
    Change-Id: I6319cd9f2fd27893b389ea0f10c8fe5a5a191432
    Signed-off-by: Zhao, Lijian <lijian.zhao at intel.com>
---
 src/mainboard/intel/amenia/devicetree.cb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mainboard/intel/amenia/devicetree.cb b/src/mainboard/intel/amenia/devicetree.cb
index 2080d6f..36abe97 100644
--- a/src/mainboard/intel/amenia/devicetree.cb
+++ b/src/mainboard/intel/amenia/devicetree.cb
@@ -8,7 +8,7 @@ chip soc/intel/apollolake
 	register "pcie_rp2_clkreq_pin" = "0"    # SSD
 
 	# Integrated Sensor Hub
-	register "integrated_sensor_hub_enable" = "0"
+	register "integrated_sensor_hub_enable" = "1"
 
 	# EMMC TX DATA Delay 1#
 	# 0x1A[14:8] stands for 26*125 = 3250 pSec delay for HS400



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