[coreboot-gerrit] New patch to review for coreboot: marvell/mvmap2315: add watchdog timer driver

hakim giydan (hgiydan@marvell.com) gerrit at coreboot.org
Thu Jun 30 18:33:32 CEST 2016


hakim giydan (hgiydan at marvell.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15519

-gerrit

commit 57b1095dd3d362563356ca6f1816913585e25494
Author: Hakim Giydan <hgiydan at marvell.com>
Date:   Thu Jun 30 09:02:38 2016 -0700

    marvell/mvmap2315: add watchdog timer driver
    
    Change-Id: Ie9c9297f321c838f86e5536aab29f67a0eeb053d
    Signed-off-by: Hakim Giydan <hgiydan at marvell.com>
---
 src/soc/marvell/mvmap2315/Makefile.inc             |  1 +
 src/soc/marvell/mvmap2315/include/soc/addressmap.h |  1 +
 src/soc/marvell/mvmap2315/include/soc/watchdog.h   | 54 ++++++++++++++++
 src/soc/marvell/mvmap2315/romstage.c               | 16 ++++-
 src/soc/marvell/mvmap2315/watchdog.c               | 74 ++++++++++++++++++++++
 5 files changed, 144 insertions(+), 2 deletions(-)

diff --git a/src/soc/marvell/mvmap2315/Makefile.inc b/src/soc/marvell/mvmap2315/Makefile.inc
index a408049..ca32b76 100644
--- a/src/soc/marvell/mvmap2315/Makefile.inc
+++ b/src/soc/marvell/mvmap2315/Makefile.inc
@@ -39,6 +39,7 @@ romstage-y += power.c
 romstage-y += romstage_asm.S
 romstage-y += romstage.c
 romstage-y += uart.c
+romstage-y += watchdog.c
 
 CPPFLAGS_common += -Isrc/soc/marvell/mvmap2315/include/
 
diff --git a/src/soc/marvell/mvmap2315/include/soc/addressmap.h b/src/soc/marvell/mvmap2315/include/soc/addressmap.h
index 1303cc8..0de4222 100644
--- a/src/soc/marvell/mvmap2315/include/soc/addressmap.h
+++ b/src/soc/marvell/mvmap2315/include/soc/addressmap.h
@@ -34,6 +34,7 @@ enum {
 	MVMAP2315_GENTIMER_BASE = 0xE0137000,
 	MVMAP2315_CPU_BASE = 0xE013F200,
 	MVMAP2315_PADWRAP_BASE = 0xE0140000,
+	MVMAP2315_WDT0_BASE = 0XE1010000,
 	MVMAP2315_TIMER0_BASE = 0xE1020000,
 	MVMAP2315_MPMU_CLK_BASE = 0xEF000800,
 	MVMAP2315_AP_GICD_BASE = 0xF0401000,
diff --git a/src/soc/marvell/mvmap2315/include/soc/watchdog.h b/src/soc/marvell/mvmap2315/include/soc/watchdog.h
new file mode 100644
index 0000000..6756585
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/watchdog.h
@@ -0,0 +1,54 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef __WATCHDOG_H__
+#define __WATCHDOG_H__
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <types.h>
+
+#include <soc/addressmap.h>
+
+#define MVMAP2315_WDT_CR_RPL_SHIFT		2
+#define MVMAP2315_WDT_CR_RMOD			BIT(1)
+#define MVMAP2315_WDT_CR_EN			BIT(0)
+#define MVMAP2315_WDT_TORR_TOP_SHIFT		0
+#define MVMAP2315_WDT_CRR_SHIFT			0
+struct mvmap2315_wdt_regs {
+	u32 wdt_cr;
+	u32 wdt_torr;
+	u32 wdt_ccvr;
+	u32 wdt_crr;
+	u32 wdt_stat;
+	u32 wdt_eoi;
+	u8 _reserved0[0xcc];
+	u32 wdt_comp_params_5;
+	u32 wdt_comp_params_4;
+	u32 wdt_comp_params_3;
+	u32 wdt_comp_params_2;
+	u32 wdt_comp_params_1;
+	u32 wdt_comp_version;
+	u32 wdt_comp_type;
+};
+
+check_member(mvmap2315_wdt_regs, wdt_comp_type, 0xfc);
+static struct mvmap2315_wdt_regs * const mvmap2315_wdt0
+					= (void *)MVMAP2315_WDT0_BASE;
+
+void enable_sp_watchdog(u32 timeout_value);
+void reset_sp_watchdog(u32 timeout_value);
+int should_reset_sp_watchdog(void);
+
+#endif /* __WATCHDOG_H__ */
diff --git a/src/soc/marvell/mvmap2315/romstage.c b/src/soc/marvell/mvmap2315/romstage.c
index f4c64d2..0e32020 100644
--- a/src/soc/marvell/mvmap2315/romstage.c
+++ b/src/soc/marvell/mvmap2315/romstage.c
@@ -28,6 +28,7 @@
 #include <soc/power.h>
 #include <soc/romstage.h>
 #include <soc/uart.h>
+#include <soc/watchdog.h>
 #include <timestamp.h>
 
 /*
@@ -58,10 +59,13 @@ void main(void)
 	printk(BIOS_INFO, "Starting monotonic timer.\n");
 	start_monotonic_timer();
 
+	enable_sp_watchdog(0);
 	timestamp_add_now(TS_START_ROMSTAGE);
 
 	set_bdb_pointers((u8 *)MVMAP2315_BDB_LCM_BASE, &bdb_info);
 
+	reset_sp_watchdog(1);
+
 	printk(BIOS_INFO, "loading and validating APMU FIRMWARE\n");
 	load_and_validate_image(&bdb_info, APMU_FIRMWARE);
 
@@ -72,6 +76,8 @@ void main(void)
 
 	apmu_start(4, 5);
 
+	reset_sp_watchdog(1);
+
 	if (!(read32((void *)MVMAP2315_LOWPWR_REG) & MVMAP2315_LOWPWR_FLAG)) {
 		printk(BIOS_INFO, "loading and validating MCU FIRMWARE\n");
 		load_and_validate_image(&bdb_info, MCU_FIRMWARE);
@@ -97,10 +103,14 @@ void main(void)
 		break;
 	}
 
+	reset_sp_watchdog(1);
+
 	apmu_declare_s0();
 
 	timestamp_add_now(TS_END_ROMSTAGE);
 
+	reset_sp_watchdog(1);
+
 	run_ramstage();
 }
 
@@ -109,8 +119,10 @@ static void romstage_continue(void)
 	uart_num = 1;
 	uart_init(uart_num);
 	printk(BIOS_INFO, "TODO: R4 Functionality to be added\n");
-	while (1)
-		;
+	while (1) {
+		if (!should_reset_sp_watchdog())
+			reset_sp_watchdog(1);
+	}
 }
 
 void platform_prog_run(struct prog *prog)
diff --git a/src/soc/marvell/mvmap2315/watchdog.c b/src/soc/marvell/mvmap2315/watchdog.c
new file mode 100644
index 0000000..72f987e
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/watchdog.c
@@ -0,0 +1,74 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <soc/watchdog.h>
+
+void enable_sp_watchdog(u32 timeout_value)
+{
+	u32 reg;
+
+	reg = read32(&mvmap2315_wdt0->wdt_cr);
+
+	/* setting watchdog Reset pulse length to the highest value
+	 * (256 Pclk cycles)
+	 */
+	reg |= 7 << MVMAP2315_WDT_CR_RPL_SHIFT;
+
+	/* setting the watchdog timer to generate a system reset */
+	reg &= ~MVMAP2315_WDT_CR_RMOD;
+
+	/* enabling the watchdog timer */
+	reg = read32(&mvmap2315_wdt0->wdt_cr);
+	reg |= MVMAP2315_WDT_CR_EN;
+	write32(&mvmap2315_wdt0->wdt_cr, reg);
+
+	/* setting watchdog Timeout Range Register */
+	reg = timeout_value << MVMAP2315_WDT_TORR_TOP_SHIFT;
+	write32(&mvmap2315_wdt0->wdt_torr, reg);
+
+	/* resetting the timer */
+	reg = 0x76 << MVMAP2315_WDT_CRR_SHIFT;
+	write32(&mvmap2315_wdt0->wdt_crr, reg);
+}
+
+void reset_sp_watchdog(u32 timeout_value)
+{
+	u32 reg;
+
+	/* setting watchdog Timeout Range Register */
+	reg = timeout_value << MVMAP2315_WDT_TORR_TOP_SHIFT;
+	write32(&mvmap2315_wdt0->wdt_torr, reg);
+
+	if (read32(&mvmap2315_wdt0->wdt_cr) & MVMAP2315_WDT_CR_EN) {
+		/* resetting the timer */
+		reg = 0x76 << MVMAP2315_WDT_CRR_SHIFT;
+		write32(&mvmap2315_wdt0->wdt_crr, reg);
+	} else {
+		/* enabling the watchdog timer */
+		reg = read32(&mvmap2315_wdt0->wdt_cr);
+		reg |= MVMAP2315_WDT_CR_EN;
+		write32(&mvmap2315_wdt0->wdt_cr, reg);
+	}
+}
+
+int should_reset_sp_watchdog(void)
+{
+	if (read32(&mvmap2315_wdt0->wdt_ccvr) <= 0x1000)
+		return 0;
+
+	return 1;
+}



More information about the coreboot-gerrit mailing list