[coreboot-gerrit] Patch merged into coreboot/master: arch/x86: Allow soc/chipset to set linking address
gerrit at coreboot.org
gerrit at coreboot.org
Thu Mar 3 23:56:11 CET 2016
the following patch was just integrated into master:
commit ccd300b4b402167bd1f390ba13378593f1962712
Author: Andrey Petrov <andrey.petrov at intel.com>
Date: Sun Feb 28 22:04:51 2016 -0800
arch/x86: Allow soc/chipset to set linking address
Until recently x86 romstage used to be linked at some default
address. The address itself is not meaningful because the code
was normally relocated at address calculated during insertion
in CBFS. Since some newer SoC run romstage at CAR it became
useful to link romstage code at some address in CAR and avoid
relocation during build/run time altogether.
Change-Id: I11bec142ab204633da0000a63792de7057e2eeaf
Signed-off-by: Andrey Petrov <andrey.petrov at intel.com>
Reviewed-on: https://review.coreboot.org/13860
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Tested-by: build bot (Jenkins)
See https://review.coreboot.org/13860 for details.
-gerrit
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