[coreboot-gerrit] Patch set updated for coreboot: rockchip: rk3399: enable mmu

[Lin Huang (hl@rock-chips.com)]

Lin Huang (hl at rock-chips.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13916

-gerrit

commit ebc56e845694baf4fb57f1425f206b6890b454cc
Author: huang lin <hl at rock-chips.com>
Date:   Thu Mar 3 14:47:30 2016 +0800

    rockchip: rk3399: enable mmu
    
    Change-Id: I66bfde396036d7a66b29517937a28f0767635066
    Signed-off-by: huang lin <hl at rock-chips.com>
---
 src/mainboard/google/gru/romstage.c                |  9 ++++++
 src/soc/rockchip/rk3399/Makefile.inc               |  3 +-
 src/soc/rockchip/rk3399/bootblock.c                |  2 ++
 .../rockchip/rk3399/include/soc/mmu_operations.h   | 31 +++++++++++++++++++
 src/soc/rockchip/rk3399/mmu_operations.c           | 36 ++++++++++++++++++++++
 5 files changed, 80 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/google/gru/romstage.c b/src/mainboard/google/gru/romstage.c
index 4786937..93eb41a 100644
--- a/src/mainboard/google/gru/romstage.c
+++ b/src/mainboard/google/gru/romstage.c
@@ -18,17 +18,26 @@
 #include <arch/cpu.h>
 #include <arch/exception.h>
 #include <arch/io.h>
+#include <arch/mmu.h>
 #include <cbfs.h>
 #include <console/console.h>
 #include <delay.h>
 #include <program_loading.h>
 #include <romstage_handoff.h>
 #include <symbols.h>
+#include <soc/mmu_operations.h>
+
+static const uint64_t dram_size = (uint64_t)CONFIG_DRAM_SIZE_MB * MiB;
 
 void main(void)
 {
 	console_init();
 	exception_init();
+
+	/*TODO: need implement sdram init */
+
+	mmu_config_range((void *)0, (uintptr_t)dram_size, CACHED_MEM);
+	mmu_config_range(_dma_coherent, _dma_coherent_size, UNCACHED_MEM);
 	cbmem_initialize_empty();
 	run_ramstage();
 }
diff --git a/src/soc/rockchip/rk3399/Makefile.inc b/src/soc/rockchip/rk3399/Makefile.inc
index 2067404..c630b26 100644
--- a/src/soc/rockchip/rk3399/Makefile.inc
+++ b/src/soc/rockchip/rk3399/Makefile.inc
@@ -20,6 +20,7 @@ bootblock-y += bootblock.c
 bootblock-y += timer.c
 bootblock-y += spi.c
 bootblock-y += clock.c
+bootblock-y += mmu_operations.c
 ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
 bootblock-$(CONFIG_DRIVERS_UART) += uart.c
 endif
@@ -37,7 +38,7 @@ romstage-y += cbmem.c
 romstage-y += timer.c
 romstage-y += spi.c
 romstage-y += clock.c
-
+romstage-y += mmu_operations.c
 ################################################################################
 
 ramstage-y += cbmem.c
diff --git a/src/soc/rockchip/rk3399/bootblock.c b/src/soc/rockchip/rk3399/bootblock.c
index ae41a08..dc604a1 100644
--- a/src/soc/rockchip/rk3399/bootblock.c
+++ b/src/soc/rockchip/rk3399/bootblock.c
@@ -18,8 +18,10 @@
 #include <arch/mmu.h>
 #include <bootblock_common.h>
 #include <console/console.h>
+#include <soc/mmu_operations.h>
 #include <symbols.h>
 
 void bootblock_soc_init(void)
 {
+	rockchip_mmu_init();
 }
diff --git a/src/soc/rockchip/rk3399/include/soc/mmu_operations.h b/src/soc/rockchip/rk3399/include/soc/mmu_operations.h
new file mode 100644
index 0000000..9772ea3
--- /dev/null
+++ b/src/soc/rockchip/rk3399/include/soc/mmu_operations.h
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Rockchip Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __SOC_ROCKCHIP_RK3399_MMU_H__
+#define __SOC_ROCKCHIP_RK3399_MMU_H__
+
+#include <arch/mmu.h>
+
+enum {
+	DEV_MEM		= MA_DEV | MA_S | MA_RW,
+	CACHED_MEM	= MA_MEM | MA_NS | MA_RW,
+	SECURE_MEM	= MA_MEM | MA_S  | MA_RW,
+	UNCACHED_MEM	= MA_MEM | MA_NS | MA_RW | MA_MEM_NC,
+};
+
+void rockchip_mmu_init(void);
+#endif
+
diff --git a/src/soc/rockchip/rk3399/mmu_operations.c b/src/soc/rockchip/rk3399/mmu_operations.c
new file mode 100644
index 0000000..2c2ef2c
--- /dev/null
+++ b/src/soc/rockchip/rk3399/mmu_operations.c
@@ -0,0 +1,36 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Rockchip Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <arch/io.h>
+#include <arch/mmu.h>
+#include <bootblock_common.h>
+#include <console/console.h>
+#include <soc/mmu_operations.h>
+#include <symbols.h>
+
+void rockchip_mmu_init(void)
+{
+	mmu_init();
+
+	/* Set 0x0 to end of dram as device memory */
+	mmu_config_range((void *)0, (uintptr_t)8192 * MiB, DEV_MEM);
+
+	mmu_config_range(_sram, _sram_size, SECURE_MEM);
+
+	/* set ttb as secure */
+	mmu_config_range(_ttb, _ttb_size, SECURE_MEM);
+	mmu_enable();
+}