[coreboot-gerrit] Patch set updated for coreboot: nortbridge/sandybridge/mrccache: parse the return code of flash->write

Alexander Couzens (lynxis@fe80.eu) gerrit at coreboot.org
Fri Mar 11 02:12:51 CET 2016


Alexander Couzens (lynxis at fe80.eu) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13999

-gerrit

commit 3e2b2366c8587e4ac1613d4e4656d3091874e385
Author: Alexander Couzens <lynxis at fe80.eu>
Date:   Wed Mar 9 04:02:42 2016 +0100

    nortbridge/sandybridge/mrccache: parse the return code of flash->write
    
    Change-Id: I2738da99e4651598faeaa228fba447d0872e9ded
    Signed-off-by: Alexander Couzens <lynxis at fe80.eu>
---
 src/northbridge/intel/sandybridge/mrccache.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c
index a5dd456..37bca85 100644
--- a/src/northbridge/intel/sandybridge/mrccache.c
+++ b/src/northbridge/intel/sandybridge/mrccache.c
@@ -160,6 +160,7 @@ static void update_mrc_cache(void *unused)
 	struct mrc_data_container *current = cbmem_find(CBMEM_ID_MRCDATA);
 	struct mrc_data_container *cache, *cache_base;
 	u32 cache_size;
+	int ret;
 
 	if (!current) {
 		printk(BIOS_ERR, "No MRC cache in cbmem. Can't update flash.\n");
@@ -220,8 +221,14 @@ static void update_mrc_cache(void *unused)
 	//  4. write mrc data with flash->write()
 	printk(BIOS_DEBUG, "Finally: write MRC cache update to flash at %p\n",
 	       cache);
-	flash->write(flash, to_flash_offset(flash, cache),
+	ret = flash->write(flash, to_flash_offset(flash, cache),
 		     current->mrc_data_size + sizeof(*current), current);
+
+	if (ret)
+		printk(BIOS_WARNING, "Writing the MRC cache failed with ret %d\n",
+				ret);
+	else
+		printk(BIOS_DEBUG, "Successfully wrote MRC cache\n");
 }
 
 BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL);



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