[coreboot-gerrit] Patch set updated for coreboot: mediatek/mt8173: Enable 4GB mode

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14088

-gerrit

commit 35fdcb34718a9cf266eba520bf064ab805597e8a
Author: PH Hsu <ph.hsu at mediatek.com>
Date:   Wed Dec 16 13:48:10 2015 +0800

    mediatek/mt8173: Enable 4GB mode
    
    If the system is using 4GB of memory, enable 4GB mode in
    the memory controller.
    
    Change-Id: I4d0f8ad8d43ff45dd786f4244b11c0879d2088cd
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 94c8b7ad911c93c4325113e7afc009f2f81d2275
    Original-Change-Id: Ia3640882a46e695550e679dc70611855b64a560f
    Original-Signed-off-by: PH Hsu <ph.hsu at mediatek.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/331811
    Original-Commit-Ready: Yidi Lin <yidi.lin at mediatek.com>
    Original-Tested-by: Yidi Lin <yidi.lin at mediatek.com>
    Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
---
 src/soc/mediatek/mt8173/emi.c                  | 14 ++++++++++++++
 src/soc/mediatek/mt8173/include/soc/infracfg.h |  4 ++++
 src/soc/mediatek/mt8173/include/soc/pericfg.h  |  8 ++++++++
 3 files changed, 26 insertions(+)

diff --git a/src/soc/mediatek/mt8173/emi.c b/src/soc/mediatek/mt8173/emi.c
index 1ff4f23..9c89134 100644
--- a/src/soc/mediatek/mt8173/emi.c
+++ b/src/soc/mediatek/mt8173/emi.c
@@ -25,6 +25,8 @@
 #include <soc/dramc_pi_api.h>
 #include <soc/mt6391.h>
 #include <soc/pll.h>
+#include <soc/infracfg.h>
+#include <soc/pericfg.h>
 
 struct emi_regs *emi_regs = (void *)EMI_BASE;
 
@@ -163,6 +165,17 @@ size_t sdram_size(void)
 	return ((size_t)1 << (bit_counter - 3));
 }
 
+static void init_4GB_mode(void)
+{
+	if (sdram_size() == (size_t)4 * GiB) {
+		setbits_le32(&mt8173_pericfg->axi_bus_ctl3, PERISYS_4G_SUPPORT);
+		setbits_le32(&mt8173_infracfg->infra_misc, DDR_4GB_SUPPORT_EN);
+	} else {
+		clrbits_le32(&mt8173_pericfg->axi_bus_ctl3, PERISYS_4G_SUPPORT);
+		clrbits_le32(&mt8173_infracfg->infra_misc, DDR_4GB_SUPPORT_EN);
+	}
+}
+
 void mt_set_emi(const struct mt8173_sdram_params *sdram_params)
 {
 	/* voltage info */
@@ -175,4 +188,5 @@ void mt_set_emi(const struct mt8173_sdram_params *sdram_params)
 
 	init_dram(sdram_params);
 	do_calib(sdram_params);
+	init_4GB_mode();
 }
diff --git a/src/soc/mediatek/mt8173/include/soc/infracfg.h b/src/soc/mediatek/mt8173/include/soc/infracfg.h
index 1277822..60a5209 100644
--- a/src/soc/mediatek/mt8173/include/soc/infracfg.h
+++ b/src/soc/mediatek/mt8173/include/soc/infracfg.h
@@ -118,4 +118,8 @@ enum {
 	L2C_SRAM_PDN = 1 << 7
 };
 
+enum {
+	DDR_4GB_SUPPORT_EN = 1 << 13
+};
+
 #endif	/* __SOC_MEDIATEK_MT8173_INFRACFG_H__ */
diff --git a/src/soc/mediatek/mt8173/include/soc/pericfg.h b/src/soc/mediatek/mt8173/include/soc/pericfg.h
index 335db10..8e3e477 100644
--- a/src/soc/mediatek/mt8173/include/soc/pericfg.h
+++ b/src/soc/mediatek/mt8173/include/soc/pericfg.h
@@ -89,4 +89,12 @@ enum {
         PERICFG_UART0_PDN = 1 << 19
 };
 
+/*
+ * PERI 4GB control
+ */
+
+enum {
+        PERISYS_4G_SUPPORT = 1 << 15
+};
+
 #endif	/* __SOC_MEDIATEK_MT8173_PERICFG_H__ */