[coreboot-gerrit] Patch set updated for coreboot: nb/amd/amdmct/mct_ddr3: Ensure BlockRxDqsLock does not remain set
Timothy Pearson (tpearson@raptorengineeringinc.com)
gerrit at coreboot.org
Sun Mar 20 20:43:02 CET 2016
Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14144
-gerrit
commit ceb3b527d7bc7566f2cee41b9e9b7e946f1b1977
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date: Sun Mar 20 14:21:53 2016 -0500
nb/amd/amdmct/mct_ddr3: Ensure BlockRxDqsLock does not remain set
Under certain conditions (training abort) BlockRxDqsLock could
remain set in violation of the BKDG. Ensure BlockRxDqsLock is
reset to 0 after a lane training abort.
Change-Id: I1a49a24d02b2b7cacae074794ec274a424a9e66b
---
src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
index 15b5ea4..5d75fb0 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
@@ -1725,6 +1725,12 @@ static void TrainDQSReceiverEnCyc_D_Fam15(struct MCTStatStruc *pMCTstat,
"Training for receiver %d on DCT %d aborted\n",
__func__, lane, Receiver, dct);
}
+
+ /* Restore BlockRxDqsLock setting to normal operation in preparation for retraining */
+ dword = Get_NB32_index_wait_DCT(dev, dct, index_reg, 0x0d0f0030 | (lane << 8));
+ dword &= ~(0x1 << 8); /* BlockRxDqsLock = 0 */
+ Set_NB32_index_wait_DCT(dev, dct, index_reg, 0x0d0f0030 | (lane << 8), dword);
+
break;
}
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