[coreboot-gerrit] Patch merged into coreboot/master: nb/intel/sandybridge: increase MMCONF_BASE_ADDRESS

gerrit at coreboot.org gerrit at coreboot.org
Mon Mar 21 23:13:18 CET 2016


the following patch was just integrated into master:
commit 5c10abeb734d8adee217bc5ed1edcb042064d239
Author: Patrick Rudolph <siro at das-labor.org>
Date:   Tue Mar 15 07:44:49 2016 +0100

    nb/intel/sandybridge: increase MMCONF_BASE_ADDRESS
    
    Set MMCONF_BASE_ADDRESS to 0xf8000000.
    It was already done for some boards, but not all.
    
    The sandybridge chipset code assumes 64 pci buses behind MMCONF.
    Therefore, only 64MiB of physical address space is required.
    
    Increasing the address allows to use additional 128MiB of MMIO
    space and to use the Intel IGD and a PEG at the same time.
    
    Previously it wasn't possible to use both at the same time,
    as two 256MiB areas won't fit into MMIO space.
    
    Test system:
     * Gigabyte GA-B75M-D3H
     * Intel Pentium CPU G2130
     * Onboard GPU Intel IvyBridge Desktop
     * PEG GPU AMD RV770
    
    Change-Id: I3bf72439056c8089ada6899bb0605e5cd9d89cd6
    Signed-off-by: Patrick Rudolph <siro at das-labor.org>
    Reviewed-on: https://review.coreboot.org/14096
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-by: Philipp Deppenwiese <zaolin.daisuki at googlemail.com>


See https://review.coreboot.org/14096 for details.

-gerrit



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