[coreboot-gerrit] Patch set updated for coreboot: google/pyro: update timing of sdmode toggling
Kevin Chiu (Kevin.Chiu@quantatw.com)
gerrit at coreboot.org
Wed Nov 9 11:31:32 CET 2016
Kevin Chiu (Kevin.Chiu at quantatw.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17336
-gerrit
commit ff339f8653e79c539710efb686d5f2c254134c08
Author: Kevin Chiu <Kevin.Chiu at quantatw.com>
Date: Wed Nov 9 14:23:06 2016 +0800
google/pyro: update timing of sdmode toggling
Maxim98357a speaker amp requires BCLK & SFRM to be active
and stable before it is unmuted. If there is a BLCK and no
SFRM, it results in a pop sound.
sdmode_delay property already exists which facilitates this
configuration. This patch updates "sdmode_delay" to avoid
pop sound.
BUG=chrome-os-partner:58112
BRANCH=master
TEST=emerge-pyro coreboot chromeos-bootimage
Change-Id: I5aee41957c9de7a05f962d3ede74efc6998a78fc
Signed-off-by: Kevin Chiu <Kevin.Chiu at quantatw.com>
---
src/mainboard/google/reef/variants/pyro/devicetree.cb | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mainboard/google/reef/variants/pyro/devicetree.cb b/src/mainboard/google/reef/variants/pyro/devicetree.cb
index a0ba584..ecb8519 100644
--- a/src/mainboard/google/reef/variants/pyro/devicetree.cb
+++ b/src/mainboard/google/reef/variants/pyro/devicetree.cb
@@ -85,6 +85,7 @@ chip soc/intel/apollolake
device pci 0e.0 on # - Audio
chip drivers/generic/max98357a
register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
+ register "sdmode_delay" = "5"
device generic 0 on end
end
end
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