[coreboot-gerrit] Patch set updated for coreboot: src & payloads: Declare variables outside of for loops
Martin Roth (martinroth@google.com)
gerrit at coreboot.org
Tue Nov 29 22:03:09 CET 2016
Martin Roth (martinroth at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17641
-gerrit
commit 7d4da77b827edbe56102bed49df9ec16f482618a
Author: Martin Roth <martinroth at google.com>
Date: Tue Nov 29 09:42:25 2016 -0700
src & payloads: Declare variables outside of for loops
Change-Id: I17888a9c81e1f369f7db062bf269c2b0e993d085
Signed-off-by: Martin Roth <martinroth at google.com>
---
payloads/coreinfo/timestamps_module.c | 3 ++-
src/arch/riscv/trap_handler.c | 6 ++++--
src/arch/riscv/virtual_memory.c | 10 ++++++----
src/northbridge/intel/gm45/gma.c | 3 ++-
4 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/payloads/coreinfo/timestamps_module.c b/payloads/coreinfo/timestamps_module.c
index eedb3c9..a9ad4dd 100644
--- a/payloads/coreinfo/timestamps_module.c
+++ b/payloads/coreinfo/timestamps_module.c
@@ -144,6 +144,7 @@ static uint64_t timestamp_print_entry(char *buffer, size_t size, uint32_t *cur,
static int timestamps_module_init(void)
{
+ int i;
/* Make sure that lib_sysinfo is initialized */
int ret = lib_get_sysinfo();
@@ -184,7 +185,7 @@ static int timestamps_module_init(void)
prev_stamp = base_time;
total_time = 0;
- for (int i = 0; i < n_entries; i++) {
+ for (i = 0; i < n_entries; i++) {
uint64_t stamp;
const struct timestamp_entry *tse = ×tamps->entries[i];
diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c
index c7a11c6..7654581 100644
--- a/src/arch/riscv/trap_handler.c
+++ b/src/arch/riscv/trap_handler.c
@@ -172,6 +172,7 @@ static uint32_t fetch_instruction(uintptr_t vaddr) {
}
void handle_misaligned_load(trapframe *tf) {
+ int i;
printk(BIOS_DEBUG, "Trapframe ptr: %p\n", tf);
uintptr_t faultingInstructionAddr = tf->epc;
insn_t faultingInstruction = fetch_instruction(faultingInstructionAddr);
@@ -185,7 +186,7 @@ void handle_misaligned_load(trapframe *tf) {
// load double, handle the issue
void* badAddress = (void*) tf->badvaddr;
uint64_t value = 0;
- for (int i = 0; i < 8; i++) {
+ for (i = 0; i < 8; i++) {
value <<= 8;
value += mprv_read_u8(badAddress+i);
}
@@ -201,6 +202,7 @@ void handle_misaligned_load(trapframe *tf) {
}
void handle_misaligned_store(trapframe *tf) {
+ int i;
printk(BIOS_DEBUG, "Trapframe ptr: %p\n", tf);
uintptr_t faultingInstructionAddr = tf->epc;
insn_t faultingInstruction = fetch_instruction(faultingInstructionAddr);
@@ -214,7 +216,7 @@ void handle_misaligned_store(trapframe *tf) {
// store double, handle the issue
void* badAddress = (void*) tf->badvaddr;
uint64_t value = tf->gpr[srcRegister];
- for (int i = 0; i < 8; i++) {
+ for (i = 0; i < 8; i++) {
mprv_write_u8(badAddress+i, value);
value >>= 8;
}
diff --git a/src/arch/riscv/virtual_memory.c b/src/arch/riscv/virtual_memory.c
index 26a0169..98605a4 100644
--- a/src/arch/riscv/virtual_memory.c
+++ b/src/arch/riscv/virtual_memory.c
@@ -189,6 +189,8 @@ pte_t pte_create(uintptr_t ppn, int prot, int user)
// We have tested this arrangement and it lets us boot harvey to user mode.
void init_vm(uintptr_t virtMemStart, uintptr_t physMemStart, pte_t *sbi_pt)
{
+ uintptr_t vaddr, paddr, i;
+ size_t j;
memset(sbi_pt, 0, RISCV_PGSIZE);
// need to leave room for sbi page
// 0xFFF... - 0xFFFFFFFF81000000 - RISCV_PGSIZE
@@ -201,11 +203,11 @@ void init_vm(uintptr_t virtMemStart, uintptr_t physMemStart, pte_t *sbi_pt)
// root page table
pte_t* root_pt = (void*)middle_pt + num_middle_pts * RISCV_PGSIZE;
memset(middle_pt, 0, (num_middle_pts + 1) * RISCV_PGSIZE); // 0's out middle_pt and root_pt
- for (size_t i = 0; i < num_middle_pts; i++)
- root_pt[(1<<RISCV_PGLEVEL_BITS)-num_middle_pts+i] = ptd_create(((uintptr_t)middle_pt >> RISCV_PGSHIFT) + i);
+ for (j = 0; j < num_middle_pts; j++)
+ root_pt[(1<<RISCV_PGLEVEL_BITS)-num_middle_pts+j] = ptd_create(((uintptr_t)middle_pt >> RISCV_PGSHIFT) + j);
// fill the middle page table
- for (uintptr_t vaddr = virtMemStart, paddr = physMemStart;
+ for (vaddr = virtMemStart, paddr = physMemStart;
paddr < physMemStart + memorySize;
vaddr += SUPERPAGE_SIZE, paddr += SUPERPAGE_SIZE) {
int l2_shift = RISCV_PGLEVEL_BITS + RISCV_PGSHIFT;
@@ -220,7 +222,7 @@ void init_vm(uintptr_t virtMemStart, uintptr_t physMemStart, pte_t *sbi_pt)
uintptr_t num_sbi_pages = 1;
uintptr_t sbiStartAddress = (uintptr_t) &sbi_page;
uintptr_t sbiAddr = sbiStartAddress;
- for (uintptr_t i = 0; i < num_sbi_pages; i++) {
+ for (i = 0; i < num_sbi_pages; i++) {
uintptr_t idx = (1 << RISCV_PGLEVEL_BITS) - num_sbi_pages + i;
sbi_pt[idx] = pte_create(sbiAddr >> RISCV_PGSHIFT,
PTE_R|PTE_X, 0);
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index 37f81c5..a6a3df8 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -596,12 +596,13 @@ static void gma_init_vga(const struct northbridge_intel_gm45_config *info,
/* if vga is not connected it should not have a correct header */
static u8 vga_connected(u8 *mmio)
{
+ int i;
u8 vga_edid[128];
u8 header[8] = {0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00};
intel_gmbus_read_edid(mmio + GMBUS0, 2, 0x50, vga_edid,
sizeof(vga_edid));
intel_gmbus_stop(mmio + GMBUS0);
- for (int i = 0; i < 8; i++) {
+ for (i = 0; i < 8; i++) {
if (vga_edid[i] != header[i]) {
printk(BIOS_DEBUG, "VGA not connected. Using LVDS display\n");
return 0;
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