[coreboot-gerrit] Patch set updated for coreboot: mainboard/amd/torpedo: Improve code formatting
HAOUAS Elyes (ehaouas@noos.fr)
gerrit at coreboot.org
Sat Oct 1 19:57:52 CEST 2016
HAOUAS Elyes (ehaouas at noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16846
-gerrit
commit c4bed8d9612e5f724f75950c5deb969cd666b847
Author: Elyes HAOUAS <ehaouas at noos.fr>
Date: Sat Oct 1 15:10:11 2016 +0200
mainboard/amd/torpedo: Improve code formatting
Change-Id: I18de4740e0d3512ec81e10b32d13d07a35791b57
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
src/mainboard/amd/torpedo/BiosCallOuts.c | 264 +++----
src/mainboard/amd/torpedo/OemCustomize.c | 196 +++---
src/mainboard/amd/torpedo/acpi_tables.c | 57 +-
src/mainboard/amd/torpedo/buildOpts.c | 40 +-
src/mainboard/amd/torpedo/fadt.c | 2 +-
src/mainboard/amd/torpedo/gpio.c | 88 ++-
src/mainboard/amd/torpedo/gpio.h | 1116 +++++++++++++++---------------
src/mainboard/amd/torpedo/mainboard.c | 4 +-
8 files changed, 882 insertions(+), 885 deletions(-)
diff --git a/src/mainboard/amd/torpedo/BiosCallOuts.c b/src/mainboard/amd/torpedo/BiosCallOuts.c
index b64cef3..cb2e5e5 100644
--- a/src/mainboard/amd/torpedo/BiosCallOuts.c
+++ b/src/mainboard/amd/torpedo/BiosCallOuts.c
@@ -43,147 +43,147 @@ const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
/* Call the host environment interface to provide a user hook opportunity. */
static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr)
{
- AGESA_STATUS Status;
- UINTN FcnData;
- MEM_DATA_STRUCT *MemData;
- UINT32 AcpiMmioAddr;
- UINT32 GpioMmioAddr;
- UINT8 Data8;
- UINT16 Data16;
+ AGESA_STATUS Status;
+ UINTN FcnData;
+ MEM_DATA_STRUCT *MemData;
+ UINT32 AcpiMmioAddr;
+ UINT32 GpioMmioAddr;
+ UINT8 Data8;
+ UINT16 Data16;
- FcnData = Data;
- MemData = ConfigPtr;
+ FcnData = Data;
+ MemData = ConfigPtr;
- Status = AGESA_SUCCESS;
- /* Get SB MMIO Base (AcpiMmioAddr) */
- WriteIo8 (0xCD6, 0x27);
- Data8 = ReadIo8(0xCD7);
- Data16 = Data8 << 8;
- WriteIo8 (0xCD6, 0x26);
- Data8 = ReadIo8(0xCD7);
- Data16 |= Data8;
- AcpiMmioAddr = (UINT32)Data16 << 16;
- GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
+ Status = AGESA_SUCCESS;
+ /* Get SB MMIO Base (AcpiMmioAddr) */
+ WriteIo8 (0xCD6, 0x27);
+ Data8 = ReadIo8(0xCD7);
+ Data16 = Data8 << 8;
+ WriteIo8 (0xCD6, 0x26);
+ Data8 = ReadIo8(0xCD7);
+ Data16 |= Data8;
+ AcpiMmioAddr = (UINT32)Data16 << 16;
+ GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
- switch(MemData->ParameterListPtr->DDR3Voltage){
- case VOLT1_35:
- Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
- Data8 &= ~(UINT8)BIT6;
- Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
- Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
- Data8 |= (UINT8)BIT6;
- Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
- break;
- case VOLT1_25:
- Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
- Data8 &= ~(UINT8)BIT6;
- Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
- Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
- Data8 &= ~(UINT8)BIT6;
- Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
- break;
- case VOLT1_5:
- default:
- Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
- Data8 |= (UINT8)BIT6;
- Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
- }
- return Status;
+ switch(MemData->ParameterListPtr->DDR3Voltage){
+ case VOLT1_35:
+ Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
+ Data8 &= ~(UINT8)BIT6;
+ Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
+ Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
+ Data8 |= (UINT8)BIT6;
+ Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
+ break;
+ case VOLT1_25:
+ Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
+ Data8 &= ~(UINT8)BIT6;
+ Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
+ Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
+ Data8 &= ~(UINT8)BIT6;
+ Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
+ break;
+ case VOLT1_5:
+ default:
+ Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
+ Data8 |= (UINT8)BIT6;
+ Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
+ }
+ return Status;
}
/* PCIE slot reset control */
static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr)
{
- AGESA_STATUS Status;
- UINTN FcnData;
- PCIe_SLOT_RESET_INFO *ResetInfo;
+ AGESA_STATUS Status;
+ UINTN FcnData;
+ PCIe_SLOT_RESET_INFO *ResetInfo;
- UINT32 GpioMmioAddr;
- UINT32 AcpiMmioAddr;
- UINT8 Data8;
- UINT16 Data16;
+ UINT32 GpioMmioAddr;
+ UINT32 AcpiMmioAddr;
+ UINT8 Data8;
+ UINT16 Data16;
- FcnData = Data;
- ResetInfo = ConfigPtr;
- // Get SB MMIO Base (AcpiMmioAddr)
- WriteIo8(0xCD6, 0x27);
- Data8 = ReadIo8(0xCD7);
- Data16 = Data8 << 8;
- WriteIo8(0xCD6, 0x26);
- Data8 = ReadIo8(0xCD7);
- Data16 |= Data8;
- AcpiMmioAddr = (UINT32)Data16 << 16;
- Status = AGESA_UNSUPPORTED;
- GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
+ FcnData = Data;
+ ResetInfo = ConfigPtr;
+ // Get SB MMIO Base (AcpiMmioAddr)
+ WriteIo8(0xCD6, 0x27);
+ Data8 = ReadIo8(0xCD7);
+ Data16 = Data8 << 8;
+ WriteIo8(0xCD6, 0x26);
+ Data8 = ReadIo8(0xCD7);
+ Data16 |= Data8;
+ AcpiMmioAddr = (UINT32)Data16 << 16;
+ Status = AGESA_UNSUPPORTED;
+ GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
- if (ResetInfo->ResetControl == DeassertSlotReset) {
- if (ResetInfo->ResetId & (BIT2+BIT3)) { //de-assert
- // [GPIO] GPIO45: PE_GPIO1 MXM_POWER_ENABLE, SET HIGH
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG45);
- if (Data8 & BIT7) {
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG28);
- while (!(Data8 & BIT7)) {
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG28);
- }
- // GPIO44: PE_GPIO0 MXM Reset
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG44);
- Data8 |= BIT6 ;
- Write64Mem8 (GpioMmioAddr+SB_GPIO_REG44, Data8);
- Status = AGESA_SUCCESS;
- }
- } else {
- Status = AGESA_UNSUPPORTED;
- }
- // Travis
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG24);
- Data8 |= BIT6;
- Write64Mem8 (GpioMmioAddr+SB_GPIO_REG24, Data8);
- //DE-Assert ALL PCIE RESET
- // APU GPP0 (Dev 4)
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
- Data8 |= BIT6 ;
- Write64Mem8 (GpioMmioAddr+SB_GPIO_REG25, Data8);
- // APU GPP1 (Dev 5)
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG01);
- Data8 |= BIT6;
- Write64Mem8 (GpioMmioAddr+SB_GPIO_REG01, Data8);
- // APU GPP2 (Dev 6)
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG00);
- Data8 |= BIT6;
- Write64Mem8 (GpioMmioAddr+SB_GPIO_REG00, Data8);
- // APU GPP3 (Dev 7)
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG27);
- Data8 |= BIT6;
- Write64Mem8 (GpioMmioAddr+SB_GPIO_REG27, Data8);
- } else {
- if (ResetInfo->ResetId & (BIT2+BIT3)) { //Pcie Slot Reset is supported
- // GPIO44: PE_GPIO0 MXM Reset
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG44);
- Data8 &= ~(UINT8)BIT6;
- Write64Mem8 (GpioMmioAddr+SB_GPIO_REG44, Data8);
- Status = AGESA_SUCCESS;
- }
- // Travis
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG24);
- Data8 &= ~(UINT8)BIT6 ;
- Write64Mem8 (GpioMmioAddr+SB_GPIO_REG24, Data8);
- //Assert ALL PCIE RESET
- // APU GPP0 (Dev 4)
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
- Data8 &= ~(UINT8)BIT6;
- Write64Mem8 (GpioMmioAddr+SB_GPIO_REG25, Data8);
- // APU GPP1 (Dev 5)
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG01);
- Data8 &= ~(UINT8)BIT6;
- Write64Mem8 (GpioMmioAddr+SB_GPIO_REG01, Data8);
- // APU GPP2 (Dev 6)
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG00);
- Data8 &= ~(UINT8)BIT6;
- Write64Mem8 (GpioMmioAddr+SB_GPIO_REG00, Data8);
- // APU GPP3 (Dev 7)
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG27);
- Data8 &= ~(UINT8)BIT6;
- Write64Mem8 (GpioMmioAddr+SB_GPIO_REG27, Data8);
- }
- return Status;
+ if (ResetInfo->ResetControl == DeassertSlotReset) {
+ if (ResetInfo->ResetId & (BIT2+BIT3)) { //de-assert
+ // [GPIO] GPIO45: PE_GPIO1 MXM_POWER_ENABLE, SET HIGH
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG45);
+ if (Data8 & BIT7) {
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG28);
+ while (!(Data8 & BIT7)) {
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG28);
+ }
+ // GPIO44: PE_GPIO0 MXM Reset
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG44);
+ Data8 |= BIT6 ;
+ Write64Mem8 (GpioMmioAddr+SB_GPIO_REG44, Data8);
+ Status = AGESA_SUCCESS;
+ }
+ } else {
+ Status = AGESA_UNSUPPORTED;
+ }
+ // Travis
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG24);
+ Data8 |= BIT6;
+ Write64Mem8 (GpioMmioAddr+SB_GPIO_REG24, Data8);
+ //DE-Assert ALL PCIE RESET
+ // APU GPP0 (Dev 4)
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
+ Data8 |= BIT6 ;
+ Write64Mem8 (GpioMmioAddr+SB_GPIO_REG25, Data8);
+ // APU GPP1 (Dev 5)
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG01);
+ Data8 |= BIT6;
+ Write64Mem8 (GpioMmioAddr+SB_GPIO_REG01, Data8);
+ // APU GPP2 (Dev 6)
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG00);
+ Data8 |= BIT6;
+ Write64Mem8 (GpioMmioAddr+SB_GPIO_REG00, Data8);
+ // APU GPP3 (Dev 7)
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG27);
+ Data8 |= BIT6;
+ Write64Mem8 (GpioMmioAddr+SB_GPIO_REG27, Data8);
+ } else {
+ if (ResetInfo->ResetId & (BIT2+BIT3)) { //Pcie Slot Reset is supported
+ // GPIO44: PE_GPIO0 MXM Reset
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG44);
+ Data8 &= ~(UINT8)BIT6;
+ Write64Mem8 (GpioMmioAddr+SB_GPIO_REG44, Data8);
+ Status = AGESA_SUCCESS;
+ }
+ // Travis
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG24);
+ Data8 &= ~(UINT8)BIT6 ;
+ Write64Mem8 (GpioMmioAddr+SB_GPIO_REG24, Data8);
+ //Assert ALL PCIE RESET
+ // APU GPP0 (Dev 4)
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
+ Data8 &= ~(UINT8)BIT6;
+ Write64Mem8 (GpioMmioAddr+SB_GPIO_REG25, Data8);
+ // APU GPP1 (Dev 5)
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG01);
+ Data8 &= ~(UINT8)BIT6;
+ Write64Mem8 (GpioMmioAddr+SB_GPIO_REG01, Data8);
+ // APU GPP2 (Dev 6)
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG00);
+ Data8 &= ~(UINT8)BIT6;
+ Write64Mem8 (GpioMmioAddr+SB_GPIO_REG00, Data8);
+ // APU GPP3 (Dev 7)
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG27);
+ Data8 &= ~(UINT8)BIT6;
+ Write64Mem8 (GpioMmioAddr+SB_GPIO_REG27, Data8);
+ }
+ return Status;
}
diff --git a/src/mainboard/amd/torpedo/OemCustomize.c b/src/mainboard/amd/torpedo/OemCustomize.c
index 2293039..3c20047 100644
--- a/src/mainboard/amd/torpedo/OemCustomize.c
+++ b/src/mainboard/amd/torpedo/OemCustomize.c
@@ -23,70 +23,70 @@
#define FILECODE PROC_GNB_PCIE_FAMILY_0X12_F12PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
- // Initialize Port descriptor (PCIe port, Lanes 8:15, PCI Device Number 2, ...)
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 8, 15),
- PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 2, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, BIT2)
- },
- // Initialize Port descriptor (PCIe port, Lanes 16:19, PCI Device Number 3, ...)
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 16, 19),
- PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 3, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, BIT3)
- },
- // Initialize Port descriptor (PCIe port, Lanes 4, PCI Device Number 4, ...)
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 4, 4),
- PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 4, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
- },
- // Initialize Port descriptor (PCIe port, Lanes 5, PCI Device Number 5, ...)
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 5, 5),
- PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 5, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
- },
- // Initialize Port descriptor (PCIe port, Lanes 6, PCI Device Number 6, ...)
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 6, 6),
- PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 6, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
- },
- // Initialize Port descriptor (PCIe port, Lanes 7, PCI Device Number 7, ...)
- {
- DESCRIPTOR_TERMINATE_LIST,
- PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 7, 7),
- PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 7, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
- }
- // Initialize Port descriptor (PCIe port, Lanes 8, PCI Device Number 8, ...)
-// {
-// DESCRIPTOR_TERMINATE_LIST,
-// PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 8, 8),
-// PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 8, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
-// }
+ // Initialize Port descriptor (PCIe port, Lanes 8:15, PCI Device Number 2, ...)
+ {
+ 0,
+ PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 8, 15),
+ PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 2, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, BIT2)
+ },
+ // Initialize Port descriptor (PCIe port, Lanes 16:19, PCI Device Number 3, ...)
+ {
+ 0,
+ PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 16, 19),
+ PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 3, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, BIT3)
+ },
+ // Initialize Port descriptor (PCIe port, Lanes 4, PCI Device Number 4, ...)
+ {
+ 0,
+ PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 4, 4),
+ PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 4, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
+ },
+ // Initialize Port descriptor (PCIe port, Lanes 5, PCI Device Number 5, ...)
+ {
+ 0,
+ PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 5, 5),
+ PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 5, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
+ },
+ // Initialize Port descriptor (PCIe port, Lanes 6, PCI Device Number 6, ...)
+ {
+ 0,
+ PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 6, 6),
+ PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 6, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
+ },
+ // Initialize Port descriptor (PCIe port, Lanes 7, PCI Device Number 7, ...)
+ {
+ DESCRIPTOR_TERMINATE_LIST,
+ PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 7, 7),
+ PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 7, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
+ }
+ // Initialize Port descriptor (PCIe port, Lanes 8, PCI Device Number 8, ...)
+// {
+// DESCRIPTOR_TERMINATE_LIST,
+// PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 8, 8),
+// PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 8, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0)
+// }
};
static const PCIe_DDI_DESCRIPTOR DdiList [] = {
- // Initialize Ddi descriptor (DDI interface Lanes 24:27, DdA, ...)
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 27),
- PCIE_DDI_DATA_INITIALIZER (ConnectorTypeNutmegDpToVga, Aux2, Hdp2)
- },
- // Initialize Ddi descriptor (DDI interface Lanes 28:31, DdB, ...)
- {
- DESCRIPTOR_TERMINATE_LIST,
- PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 28, 31),
- PCIE_DDI_DATA_INITIALIZER (ConnectorTypeEDP, Aux1, Hdp1)
- }
+ // Initialize Ddi descriptor (DDI interface Lanes 24:27, DdA, ...)
+ {
+ 0,
+ PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 27),
+ PCIE_DDI_DATA_INITIALIZER (ConnectorTypeNutmegDpToVga, Aux2, Hdp2)
+ },
+ // Initialize Ddi descriptor (DDI interface Lanes 28:31, DdB, ...)
+ {
+ DESCRIPTOR_TERMINATE_LIST,
+ PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 28, 31),
+ PCIE_DDI_DATA_INITIALIZER (ConnectorTypeEDP, Aux1, Hdp1)
+ }
};
static const PCIe_COMPLEX_DESCRIPTOR Llano = {
- DESCRIPTOR_TERMINATE_LIST,
- 0,
- &PortList[0],
- &DdiList[0]
+ DESCRIPTOR_TERMINATE_LIST,
+ 0,
+ &PortList[0],
+ &DdiList[0]
};
/*---------------------------------------------------------------------------------------*/
@@ -107,58 +107,58 @@ static const PCIe_COMPLEX_DESCRIPTOR Llano = {
static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly)
{
- AGESA_STATUS Status;
- VOID *LlanoPcieComplexListPtr;
- VOID *LlanoPciePortPtr;
- VOID *LlanoPcieDdiPtr;
+ AGESA_STATUS Status;
+ VOID *LlanoPcieComplexListPtr;
+ VOID *LlanoPciePortPtr;
+ VOID *LlanoPcieDdiPtr;
- ALLOCATE_HEAP_PARAMS AllocHeapParams;
+ ALLOCATE_HEAP_PARAMS AllocHeapParams;
- // GNB PCIe topology Porting
+ // GNB PCIe topology Porting
- //
- // Allocate buffer for PCIe_COMPLEX_DESCRIPTOR , PCIe_PORT_DESCRIPTOR and PCIe_DDI_DESCRIPTOR
- //
- AllocHeapParams.RequestedBufferSize = sizeof(Llano) + sizeof(PortList) + sizeof(DdiList);
+ //
+ // Allocate buffer for PCIe_COMPLEX_DESCRIPTOR , PCIe_PORT_DESCRIPTOR and PCIe_DDI_DESCRIPTOR
+ //
+ AllocHeapParams.RequestedBufferSize = sizeof(Llano) + sizeof(PortList) + sizeof(DdiList);
- AllocHeapParams.BufferHandle = AMD_MEM_MISC_HANDLES_START;
- AllocHeapParams.Persist = HEAP_LOCAL_CACHE;
- Status = HeapAllocateBuffer (&AllocHeapParams, &InitEarly->StdHeader);
+ AllocHeapParams.BufferHandle = AMD_MEM_MISC_HANDLES_START;
+ AllocHeapParams.Persist = HEAP_LOCAL_CACHE;
+ Status = HeapAllocateBuffer (&AllocHeapParams, &InitEarly->StdHeader);
ASSERT(Status == AGESA_SUCCESS);
- LlanoPcieComplexListPtr = (PCIe_COMPLEX_DESCRIPTOR *) AllocHeapParams.BufferPtr;
+ LlanoPcieComplexListPtr = (PCIe_COMPLEX_DESCRIPTOR *) AllocHeapParams.BufferPtr;
- AllocHeapParams.BufferPtr += sizeof(Llano);
- LlanoPciePortPtr = (PCIe_PORT_DESCRIPTOR *)AllocHeapParams.BufferPtr;
+ AllocHeapParams.BufferPtr += sizeof(Llano);
+ LlanoPciePortPtr = (PCIe_PORT_DESCRIPTOR *)AllocHeapParams.BufferPtr;
- AllocHeapParams.BufferPtr += sizeof(PortList);
- LlanoPcieDdiPtr = (PCIe_DDI_DESCRIPTOR *) AllocHeapParams.BufferPtr;
+ AllocHeapParams.BufferPtr += sizeof(PortList);
+ LlanoPcieDdiPtr = (PCIe_DDI_DESCRIPTOR *) AllocHeapParams.BufferPtr;
- LibAmdMemFill (LlanoPcieComplexListPtr,
- 0,
- sizeof(Llano),
- &InitEarly->StdHeader);
+ LibAmdMemFill (LlanoPcieComplexListPtr,
+ 0,
+ sizeof(Llano),
+ &InitEarly->StdHeader);
- LibAmdMemFill (LlanoPciePortPtr,
- 0,
- sizeof(PortList),
- &InitEarly->StdHeader);
+ LibAmdMemFill (LlanoPciePortPtr,
+ 0,
+ sizeof(PortList),
+ &InitEarly->StdHeader);
- LibAmdMemFill (LlanoPcieDdiPtr,
- 0,
- sizeof(DdiList),
- &InitEarly->StdHeader);
+ LibAmdMemFill (LlanoPcieDdiPtr,
+ 0,
+ sizeof(DdiList),
+ &InitEarly->StdHeader);
- LibAmdMemCopy (LlanoPcieComplexListPtr, &Llano, sizeof(Llano), &InitEarly->StdHeader);
- LibAmdMemCopy (LlanoPciePortPtr, &PortList[0], sizeof(PortList), &InitEarly->StdHeader);
- LibAmdMemCopy (LlanoPcieDdiPtr, &DdiList[0], sizeof(DdiList), &InitEarly->StdHeader);
+ LibAmdMemCopy (LlanoPcieComplexListPtr, &Llano, sizeof(Llano), &InitEarly->StdHeader);
+ LibAmdMemCopy (LlanoPciePortPtr, &PortList[0], sizeof(PortList), &InitEarly->StdHeader);
+ LibAmdMemCopy (LlanoPcieDdiPtr, &DdiList[0], sizeof(DdiList), &InitEarly->StdHeader);
- ((PCIe_COMPLEX_DESCRIPTOR*)LlanoPcieComplexListPtr)->PciePortList = (PCIe_PORT_DESCRIPTOR*)LlanoPciePortPtr;
- ((PCIe_COMPLEX_DESCRIPTOR*)LlanoPcieComplexListPtr)->DdiLinkList = (PCIe_DDI_DESCRIPTOR*)LlanoPcieDdiPtr;
+ ((PCIe_COMPLEX_DESCRIPTOR*)LlanoPcieComplexListPtr)->PciePortList = (PCIe_PORT_DESCRIPTOR*)LlanoPciePortPtr;
+ ((PCIe_COMPLEX_DESCRIPTOR*)LlanoPcieComplexListPtr)->DdiLinkList = (PCIe_DDI_DESCRIPTOR*)LlanoPcieDdiPtr;
- InitEarly->GnbConfig.PcieComplexList = LlanoPcieComplexListPtr;
- InitEarly->GnbConfig.PsppPolicy = 0;
+ InitEarly->GnbConfig.PcieComplexList = LlanoPcieComplexListPtr;
+ InitEarly->GnbConfig.PsppPolicy = 0;
return AGESA_SUCCESS;
}
@@ -174,9 +174,9 @@ static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly)
* use its default conservative settings.
*/
CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
- NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 1),
- NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2),
- PSO_END
+ NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 1),
+ NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2),
+ PSO_END
};
const struct OEM_HOOK OemCustomize = {
diff --git a/src/mainboard/amd/torpedo/acpi_tables.c b/src/mainboard/amd/torpedo/acpi_tables.c
index f014357..fef9156 100644
--- a/src/mainboard/amd/torpedo/acpi_tables.c
+++ b/src/mainboard/amd/torpedo/acpi_tables.c
@@ -29,33 +29,32 @@ extern u32 apicid_sb900;
unsigned long acpi_fill_madt(unsigned long current)
{
-
- /* create all subtables for processors */
- current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 0, 0);
- current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 1, 1);
- current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 2, 2);
- current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 3, 3);
-
- /* Write SB900 IOAPIC, only one */
- current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, apicid_sb900,
- IO_APIC_ADDR, 0);
-
- current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
- current, 0, 0, 2, 0);
- current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
- current, 0, 9, 9, 0xF);
-
- /* 0: mean bus 0--->ISA */
- /* 0: PIC 0 */
- /* 2: APIC 2 */
- /* 5 mean: 0101 --> Edge-triggered, Active high */
-
- /* create all subtables for processors */
- current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0, 5, 1);
- current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 1, 5, 1);
- current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 2, 5, 1);
- current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 3, 5, 1);
- /* 1: LINT1 connect to NMI */
-
- return current;
+ /* create all subtables for processors */
+ current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 0, 0);
+ current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 1, 1);
+ current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 2, 2);
+ current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 3, 3);
+
+ /* Write SB900 IOAPIC, only one */
+ current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, apicid_sb900,
+ IO_APIC_ADDR, 0);
+
+ current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
+ current, 0, 0, 2, 0);
+ current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
+ current, 0, 9, 9, 0xF);
+
+ /* 0: mean bus 0--->ISA */
+ /* 0: PIC 0 */
+ /* 2: APIC 2 */
+ /* 5 mean: 0101 --> Edge-triggered, Active high */
+
+ /* create all subtables for processors */
+ current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0, 5, 1);
+ current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 1, 5, 1);
+ current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 2, 5, 1);
+ current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 3, 5, 1);
+ /* 1: LINT1 connect to NMI */
+
+ return current;
}
diff --git a/src/mainboard/amd/torpedo/buildOpts.c b/src/mainboard/amd/torpedo/buildOpts.c
index d81748a..656102d 100644
--- a/src/mainboard/amd/torpedo/buildOpts.c
+++ b/src/mainboard/amd/torpedo/buildOpts.c
@@ -96,17 +96,19 @@
* version string as appropriate for the release. The trunk copy of this file
* should also be updated/incremented for the next expected version, + trailing 'X'
****************************************************************************/
- // This is the delivery package title, "LlanoPI "
- // This string MUST be exactly 8 characters long
+ // This is the delivery package title, "LlanoPI "
+ // This string MUST be exactly 8 characters long
#define AGESA_PACKAGE_STRING {'L', 'l', 'a', 'n', 'o', 'P', 'I', ' '}
- // This is the release version number of the AGESA component
- // This string MUST be exactly 12 characters long
+ // This is the release version number of the AGESA component
+ // This string MUST be exactly 12 characters long
#define AGESA_VERSION_STRING {'V', '1', '.', '1', '.', '0', '.', '0', ' ', ' ', ' ', ' '}
-// The following definitions specify the default values for various parameters in which there are
-// no clearly defined defaults to be used in the common file. The values below are based on product
-// and BKDG content, please consult the AGESA Memory team for consultation.
+/* The following definitions specify the default values for various parameters
+ * in which there are no clearly defined defaults to be used in the common file.
+ * The values below are based on product and BKDG content, please consult the
+ * AGESA Memory team for consultation.
+ */
#define DFLT_SCRUB_DRAM_RATE (0)
#define DFLT_SCRUB_L2_RATE (0)
#define DFLT_SCRUB_L3_RATE (0)
@@ -185,18 +187,18 @@
*/
CONST AP_MTRR_SETTINGS ROMDATA LlanoApMtrrSettingsList[] =
{
- { AMD_AP_MTRR_FIX64k_00000, 0x1E1E1E1E1E1E1E1Eull },
- { AMD_AP_MTRR_FIX16k_80000, 0x1E1E1E1E1E1E1E1Eull },
- { AMD_AP_MTRR_FIX16k_A0000, 0x0000000000000000ull },
- { AMD_AP_MTRR_FIX4k_C0000, 0x0000000000000000ull },
- { AMD_AP_MTRR_FIX4k_C8000, 0x0000000000000000ull },
- { AMD_AP_MTRR_FIX4k_D0000, 0x0000000000000000ull },
- { AMD_AP_MTRR_FIX4k_D8000, 0x0000000000000000ull },
- { AMD_AP_MTRR_FIX4k_E0000, 0x1818181818181818ull },
- { AMD_AP_MTRR_FIX4k_E8000, 0x1818181818181818ull },
- { AMD_AP_MTRR_FIX4k_F0000, 0x1818181818181818ull },
- { AMD_AP_MTRR_FIX4k_F8000, 0x1818181818181818ull },
- { CPU_LIST_TERMINAL }
+ { AMD_AP_MTRR_FIX64k_00000, 0x1E1E1E1E1E1E1E1Eull },
+ { AMD_AP_MTRR_FIX16k_80000, 0x1E1E1E1E1E1E1E1Eull },
+ { AMD_AP_MTRR_FIX16k_A0000, 0x0000000000000000ull },
+ { AMD_AP_MTRR_FIX4k_C0000, 0x0000000000000000ull },
+ { AMD_AP_MTRR_FIX4k_C8000, 0x0000000000000000ull },
+ { AMD_AP_MTRR_FIX4k_D0000, 0x0000000000000000ull },
+ { AMD_AP_MTRR_FIX4k_D8000, 0x0000000000000000ull },
+ { AMD_AP_MTRR_FIX4k_E0000, 0x1818181818181818ull },
+ { AMD_AP_MTRR_FIX4k_E8000, 0x1818181818181818ull },
+ { AMD_AP_MTRR_FIX4k_F0000, 0x1818181818181818ull },
+ { AMD_AP_MTRR_FIX4k_F8000, 0x1818181818181818ull },
+ { CPU_LIST_TERMINAL }
};
#define BLDCFG_AP_MTRR_SETTINGS_LIST &LlanoApMtrrSettingsList
diff --git a/src/mainboard/amd/torpedo/fadt.c b/src/mainboard/amd/torpedo/fadt.c
index b20cfc8..56a90a6 100644
--- a/src/mainboard/amd/torpedo/fadt.c
+++ b/src/mainboard/amd/torpedo/fadt.c
@@ -52,7 +52,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
header->length = 244;
header->revision = 1;
memcpy(header->oem_id, OEM_ID, 6);
- memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+ memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->asl_compiler_revision = 0;
diff --git a/src/mainboard/amd/torpedo/gpio.c b/src/mainboard/amd/torpedo/gpio.c
index ac98557..2287adc 100644
--- a/src/mainboard/amd/torpedo/gpio.c
+++ b/src/mainboard/amd/torpedo/gpio.c
@@ -40,11 +40,7 @@
#define SB_GPIO_REG27 27
#endif
-void
-gpioEarlyInit(
- void
- )
-{
+void gpioEarlyInit(void) {
u8 Flags;
u8 Data8 = 0;
u8 StripInfo = 0;
@@ -57,8 +53,8 @@ gpioEarlyInit(
u32 GpioMmioAddr = 0;
u32 IoMuxMmioAddr = 0;
u32 MiscMmioAddr = 0;
- u32 SmiMmioAddr = 0;
- u32 andMask32 = 0;
+ u32 SmiMmioAddr = 0;
+ u32 andMask32 = 0;
// Enable HUDSON MMIO Base (AcpiMmioAddr)
ReadPMIO (SB_PMIOA_REG24, AccWidthUint8, &Data8);
@@ -92,9 +88,9 @@ gpioEarlyInit(
Mmio8_And_Or (IoMuxMmioAddr, Index, 0x00, (gpio_table[Index].select & ~NonGpio));
}
// Configure GPIO
- if(!((gpio_table[Index].NonGpioGevent & NonGpio))) {
- Mmio8_And_Or (GpioMmioAddr, Index, 0xDF, gpio_table[Index].type);
- Mmio8_And_Or (GpioMmioAddr, Index, 0xA3, gpio_table[Index].value);
+ if(!((gpio_table[Index].NonGpioGevent & NonGpio))) {
+ Mmio8_And_Or (GpioMmioAddr, Index, 0xDF, gpio_table[Index].type);
+ Mmio8_And_Or (GpioMmioAddr, Index, 0xA3, gpio_table[Index].value);
}
if (Index == GPIO_65) {
if ( BoardType == 0 ) {
@@ -109,32 +105,32 @@ gpioEarlyInit(
andMask32 = ~(1 << (Index - GEVENT_00));
//EventEnable: 0-Disable, 1-Enable
- Mmio32_And_Or (SmiMmioAddr, SMIREG_EVENT_ENABLE, andMask32, (gevent_table[Index - GEVENT_00].EventEnable << (Index - GEVENT_00)));
+ Mmio32_And_Or(SmiMmioAddr, SMIREG_EVENT_ENABLE, andMask32, (gevent_table[Index - GEVENT_00].EventEnable << (Index - GEVENT_00)));
//SciTrig: 0-Falling Edge, 1-Rising Edge
- Mmio32_And_Or (SmiMmioAddr, SMIREG_SCITRIG, andMask32, (gevent_table[Index - GEVENT_00].SciTrig << (Index - GEVENT_00)));
+ Mmio32_And_Or(SmiMmioAddr, SMIREG_SCITRIG, andMask32, (gevent_table[Index - GEVENT_00].SciTrig << (Index - GEVENT_00)));
//SciLevl: 0-Edge trigger, 1-Level Trigger
- Mmio32_And_Or (SmiMmioAddr, SMIREG_SCILEVEL, andMask32, (gevent_table[Index - GEVENT_00].SciLevl << (Index - GEVENT_00)));
+ Mmio32_And_Or(SmiMmioAddr, SMIREG_SCILEVEL, andMask32, (gevent_table[Index - GEVENT_00].SciLevl << (Index - GEVENT_00)));
//SmiSciEn: 0-Not send SMI, 1-Send SMI
- Mmio32_And_Or (SmiMmioAddr, SMIREG_SMISCIEN, andMask32, (gevent_table[Index - GEVENT_00].SmiSciEn << (Index - GEVENT_00)));
+ Mmio32_And_Or(SmiMmioAddr, SMIREG_SMISCIEN, andMask32, (gevent_table[Index - GEVENT_00].SmiSciEn << (Index - GEVENT_00)));
//SciS0En: 0-Disable, 1-Enable
- Mmio32_And_Or (SmiMmioAddr, SMIREG_SCIS0EN, andMask32, (gevent_table[Index - GEVENT_00].SciS0En << (Index - GEVENT_00)));
+ Mmio32_And_Or(SmiMmioAddr, SMIREG_SCIS0EN, andMask32, (gevent_table[Index - GEVENT_00].SciS0En << (Index - GEVENT_00)));
//SciMap: 00000b ~ 11111b
- RegIndex8=(u8)((Index - GEVENT_00) >> 2);
- Data8=(u8)(((Index - GEVENT_00) & 0x3) * 8);
- Mmio32_And_Or (SmiMmioAddr, SMIREG_SCIMAP0+RegIndex8, ~(GEVENT_SCIMASK << Data8), (gevent_table[Index - GEVENT_00].SciMap << Data8));
+ RegIndex8 = (u8)((Index - GEVENT_00) >> 2);
+ Data8 = (u8)(((Index - GEVENT_00) & 0x3) * 8);
+ Mmio32_And_Or(SmiMmioAddr, SMIREG_SCIMAP0+RegIndex8, ~(GEVENT_SCIMASK << Data8), (gevent_table[Index - GEVENT_00].SciMap << Data8));
//SmiTrig: 0-Active Low, 1-Active High
- Mmio32_And_Or (SmiMmioAddr, SMIREG_SMITRIG, ~(gevent_table[Index - GEVENT_00].SmiTrig << (Index - GEVENT_00)), (gevent_table[Index - GEVENT_00].SmiTrig << (Index - GEVENT_00)));
+ Mmio32_And_Or(SmiMmioAddr, SMIREG_SMITRIG, ~(gevent_table[Index - GEVENT_00].SmiTrig << (Index - GEVENT_00)), (gevent_table[Index - GEVENT_00].SmiTrig << (Index - GEVENT_00)));
//SmiControl: 0-Disable, 1-SMI, 2-NMI, 3-IRQ13
- RegIndex8=(u8)((Index - GEVENT_00) >> 4);
- Data8=(u8)(((Index - GEVENT_00) & 0xF) * 2);
- Mmio32_And_Or (SmiMmioAddr, SMIREG_SMICONTROL0+RegIndex8, ~(SMICONTROL_MASK << Data8), (gevent_table[Index - GEVENT_00].SmiControl << Data8));
+ RegIndex8 = (u8)((Index - GEVENT_00) >> 4);
+ Data8 = (u8)(((Index - GEVENT_00) & 0xF) * 2);
+ Mmio32_And_Or(SmiMmioAddr, SMIREG_SMICONTROL0+RegIndex8, ~(SMICONTROL_MASK << Data8), (gevent_table[Index - GEVENT_00].SmiControl << Data8));
}
}
@@ -205,7 +201,7 @@ gpioEarlyInit(
Flags = 1;
}
}
- if ( Flags )
+ if (Flags)
{
// [GPIO] GPIO44: PE_GPIO0 MXM Reset set to 0 for reset, ENH164467
RWMEM (GpioMmioAddr + SB_GPIO_REG44, AccWidthUint8, 0xBF, 0);
@@ -228,7 +224,7 @@ gpioEarlyInit(
ReadMEM (GpioMmioAddr + SB_GPIO_REG28, AccWidthUint8, &Data8);
}
// [GPIO] GPIO44: PE_GPIO0 MXM Reset set to 1 for reset
- // RWMEM (GpioMmioAddr + SB_GPIO_REG44, AccWidthUint8, 0xBF, BIT6);
+ //RWMEM (GpioMmioAddr + SB_GPIO_REG44, AccWidthUint8, 0xBF, BIT6);
}
else
{
@@ -394,11 +390,11 @@ gpioEarlyInit(
// if ((Amd_SystemConfiguration.XhciSwitch == 1) || (SystemConfiguration.amdExternalUSBController == 1)) {
// disable Onboard NEC USB3.0 controller
if (!CONFIG_ONBOARD_USB30) {
- RWMEM (GpioMmioAddr + SB_GPIO_REG200, AccWidthUint8, 0xBF, 0);
- RWMEM (GpioMmioAddr + SB_GPIO_REG26, AccWidthUint8, 0xBF, 0);
- RWMEM (GpioMmioAddr + SB_GPIO_REG46, AccWidthUint8, 0xFF, BIT3); // PULL_UP DISABLE
- RWMEM (MiscMmioAddr + SB_MISC_REG00+3, AccWidthUint8, 0x0F, 0); // DISABLE GPP_CLK7
- RWMEM (GpioMmioAddr + SB_GPIO_REG172, AccWidthUint8, 0xBF, 0); // FCH_USB3.0PORT_EN# 0:ENABLE; 1:DISABLE
+ RWMEM (GpioMmioAddr + SB_GPIO_REG200, AccWidthUint8, 0xBF, 0);
+ RWMEM (GpioMmioAddr + SB_GPIO_REG26, AccWidthUint8, 0xBF, 0);
+ RWMEM (GpioMmioAddr + SB_GPIO_REG46, AccWidthUint8, 0xFF, BIT3); // PULL_UP DISABLE
+ RWMEM (MiscMmioAddr + SB_MISC_REG00+3, AccWidthUint8, 0x0F, 0); // DISABLE GPP_CLK7
+ RWMEM (GpioMmioAddr + SB_GPIO_REG172, AccWidthUint8, 0xBF, 0); // FCH_USB3.0PORT_EN# 0:ENABLE; 1:DISABLE
}
// }
@@ -407,41 +403,41 @@ gpioEarlyInit(
// amdBlueTooth: CMOS, 0 - AUTO, 1 - DISABLE
// GPIO07: BT_ON, 0 - OFF, 1 - ON
//
-if (!CONFIG_ONBOARD_BLUETOOTH) {
-//- if (SystemConfiguration.amdBlueTooth == 1) {
+ if (!CONFIG_ONBOARD_BLUETOOTH) {
+ //- if (SystemConfiguration.amdBlueTooth == 1) {
RWMEM (GpioMmioAddr + SB_GPIO_REG07, AccWidthUint8, 0xBF, 0);
-//- }
-}
+ //- }
+ }
//
// WebCam control:
// amdWebCam: CMOS, 0 - AUTO, 1 - DISABLE
// GPIO34: WEBCAM_ON#, 0 - ON, 1 - OFF
//
-if (!CONFIG_ONBOARD_WEBCAM) {
-//- if (SystemConfiguration.amdWebCam == 1) {
+ if (!CONFIG_ONBOARD_WEBCAM) {
+ //- if (SystemConfiguration.amdWebCam == 1) {
RWMEM (GpioMmioAddr + SB_GPIO_REG34, AccWidthUint8, 0xBF, BIT6);
-//- }
-}
+ //- }
+ }
//
// Travis enable:
// amdTravisCtrl: CMOS, 0 - DISABLE, 1 - ENABLE
// GPIO66: TRAVIS_EN#, 0 - ENABLE, 1 - DISABLE
//
-if (!CONFIG_ONBOARD_TRAVIS) {
-//- if (SystemConfiguration.amdTravisCtrl == 0) {
+ if (!CONFIG_ONBOARD_TRAVIS) {
+ //- if (SystemConfiguration.amdTravisCtrl == 0) {
RWMEM (GpioMmioAddr + SB_GPIO_REG66, AccWidthUint8, 0xBF, BIT6);
-//- }
-}
+ //- }
+ }
//
// Disable Light Sensor if needed
//
-if (CONFIG_ONBOARD_LIGHTSENSOR) {
-//- if (SystemConfiguration.amdLightSensor == 1) {
- RWMEM (IoMuxMmioAddr + SB_GEVENT_REG12, AccWidthUint8, 0x00, 0x1);
-//- }
-}
+ if (CONFIG_ONBOARD_LIGHTSENSOR) {
+ //- if (SystemConfiguration.amdLightSensor == 1) {
+ RWMEM (IoMuxMmioAddr + SB_GEVENT_REG12, AccWidthUint8, 0x00, 0x1);
+ //- }
+ }
}
diff --git a/src/mainboard/amd/torpedo/gpio.h b/src/mainboard/amd/torpedo/gpio.h
index f2ceb02..b47d674 100644
--- a/src/mainboard/amd/torpedo/gpio.h
+++ b/src/mainboard/amd/torpedo/gpio.h
@@ -31,28 +31,28 @@
*Mmio32_Ptr( BaseAddr, Register )
#define Mmio32_And_Or( BaseAddr, Register, AndData, OrData ) \
- Mmio32_G( BaseAddr, Register ) = \
- (u32) ( \
- ( Mmio32_G( BaseAddr, Register ) & \
- (u32)(AndData) \
- ) | \
- (u32)(OrData) \
- )
+ Mmio32_G( BaseAddr, Register ) = \
+ (u32) ( \
+ ( Mmio32_G( BaseAddr, Register ) & \
+ (u32)(AndData) \
+ ) | \
+ (u32)(OrData) \
+ )
#define Mmio8_Ptr( BaseAddr, Register ) \
- ( (volatile u8 *)Mmio_Address( BaseAddr, Register ) )
+ ( (volatile u8 *)Mmio_Address( BaseAddr, Register ) )
#define Mmio8_G( BaseAddr, Register ) \
- *Mmio8_Ptr( BaseAddr, Register )
+ *Mmio8_Ptr( BaseAddr, Register )
#define Mmio8_And_Or( BaseAddr, Register, AndData, OrData ) \
- Mmio8_G( BaseAddr, Register ) = \
- (u8) ( \
- ( Mmio8_G( BaseAddr, Register ) & \
- (u8)(AndData) \
- ) | \
- (u8)(OrData) \
- )
+ Mmio8_G( BaseAddr, Register ) = \
+ (u8) ( \
+ ( Mmio8_G( BaseAddr, Register ) & \
+ (u8)(AndData) \
+ ) | \
+ (u8)(OrData) \
+ )
#define SMIREG_EVENT_ENABLE 0x04
#define SMIREG_SCITRIG 0x08
@@ -109,8 +109,8 @@
#define GPIO_20_SELECT FUNCTION1 // PX_MUX for DOCKING card, PX MUX selection in mux mode. dGPU enable with high(option)
#define GPIO_21_SELECT FUNCTION1 // DOCK_MUX for DCKING card, MUX selection output. Docking display enabled when high(option)
#define GPIO_22_SELECT FUNCTION1 // SB_PWR_LV, INDICATE TO THE MXM THE SYSTEM IS IN LOW BATTERY MODE
- // 1:BATTERY IS FINE(DEFAULT)
- // 0:BATTERY IS LOW
+ // 1:BATTERY IS FINE(DEFAULT)
+ // 0:BATTERY IS LOW
#define GPIO_23_SELECT FUNCTION1 // CODEC_ON.1: CODEC ON (default)0: CODEC OFF
#define GPIO_24_SELECT FUNCTION1 // Travis reset,Low active High default
#define GPIO_25_SELECT FUNCTION1+NonGpio // PCIE_RST# for LAN (AND gate with PCIE_RST#); default high
@@ -120,14 +120,14 @@
#define GPIO_29_SELECT FUNCTION1 // MEM HOT, LOW ACTIVE, OUTPUT
#define GPIO_30_SELECT FUNCTION1 // INPUT, DEFINE THE BOARD REVISION 0
#define GPIO_31_SELECT FUNCTION1 // INPUT, DEFINE THE BOARD REVISION 1
- // 00 - REVA
- // 01 - REVB
- // 10 - REVC
- // 11 - REVD
+ // 00 - REVA
+ // 01 - REVB
+ // 10 - REVC
+ // 11 - REVD
#define GPIO_32_SELECT FUNCTION1+NonGpio // PCIE_SW - HIGH:MXM; LOW:LASSO
#define GPIO_33_SELECT FUNCTION1 // USB3.0 DETECT of Express Card:USB3.0_DET#, Low active.
- // 0:USB3.0 I/F in Express CARD
- // 1:PCIE I/F in Express CARD detection
+ // 0:USB3.0 I/F in Express CARD
+ // 1:PCIE I/F in Express CARD detection
#define GPIO_34_SELECT FUNCTION1 // WEBCAM_ON#. 0: ON (default) 1: OFF
#define GPIO_35_SELECT FUNCTION1 // ODD_DA_INTH#
#define GPIO_36_SELECT FUNCTION0+NonGpio // PCICLK FOR KBC
@@ -150,8 +150,8 @@
#define GPIO_53_SELECT FUNCTION1 // ODD POWER ENABLE, HIGH ACTIVE
#define GPIO_54_SELECT FUNCTION0+NonGpio // SB_PROCHOT, OUTPUT, LOW ACTIVE
#define GPIO_55_SELECT FUNCTION2+NonGpio // MXM POWER ENABLE(POWER ON MODULE)
- // 1:ENABLE; 0:DISABLE
- // DEFAULT VALUE DEPENDS ON GPIO 9 AND 10
+ // 1:ENABLE; 0:DISABLE
+ // DEFAULT VALUE DEPENDS ON GPIO 9 AND 10
#define GPIO_56_SELECT FUNCTION0+NonGpio //HDD2_POWER/HDD0_POWER/CPU FAN ;CPU FAN
#define GPIO_57_SELECT FUNCTION1 // HDD0_POWER
#define GPIO_58_SELECT FUNCTION1 // HDD2_POWER
@@ -200,25 +200,25 @@
#define GPIO_100_SELECT FUNCTION2 // PCIE_RST2#/PCI_PME#/GEVENT4# -> APU_MEMHOT#
#define GPIO_101_SELECT FUNCTION1 // LPC_PD#/GEVENT5# -> hotplug of express card, low active
#define GPIO_102_SELECT FUNCTION0+NonGpio // USB_OC6#/IR_TX1/ GEVENT6# -> NOT USED,
- // there is a confliction to IR function when this pin is as a GEVENT.
+ // there is a confliction to IR function when this pin is as a GEVENT.
#define GPIO_103_SELECT FUNCTION0+NonGpio // DDR3_RST#/GEVENT7#/VGA_PD -> VGA_PD,
- // special pin difination for SB900 VGA OUTPUT, high active,
- // VGA power for Hudson-M2 will be down when it was asserted.
+ // special pin difination for SB900 VGA OUTPUT, high active,
+ // VGA power for Hudson-M2 will be down when it was asserted.
#define GPIO_104_SELECT FUNCTION0 // WAKE#/GEVENT8# -> WAKEUP, low active
#define GPIO_105_SELECT FUNCTION2 // SPI_HOLD/GBE_LED1/GEVENT9# - WF_RADIO (wireless radio)
#define GPIO_106_SELECT FUNCTION0 // GBE_LED2/GEVENT10# -> GBE_LED2
#define GPIO_107_SELECT FUNCTION0+NonGpio // GBE_STAT0/GEVENT11# -> GBE_STAT0
#define GPIO_108_SELECT FUNCTION2 // USB_OC0#/TRST#/GEVENT12# -> SMBALERT# (Light Sensor), low active
- // [option for SPI_TPM_CS# in Hudson-M2 A12)]
+ // [option for SPI_TPM_CS# in Hudson-M2 A12)]
#define GPIO_109_SELECT FUNCTION0 // USB_OC1#/TDI/GEVENT13# - USB OC for 0, 1,2,3 & USB_OC expresscard (usb4) &
- // USB3.0 PORT0,1:low active,disable all usb ports and new card power at a same time
+ // USB3.0 PORT0,1:low active,disable all usb ports and new card power at a same time
#define GPIO_110_SELECT FUNCTION2 // USB_OC2#/TCK/GEVENT14# -> Lasso detect or Dock detect,
- // plus judge GPIO40 and GPIO19 level,low is assert.
- // LASSO_DET# :0 & GPIO19:0 -----> LASSO is present (default)
- // DOCK#:0 & GPIO40:0 -----------> DOCK is present(option)
+ // plus judge GPIO40 and GPIO19 level,low is assert.
+ // LASSO_DET# :0 & GPIO19:0 -----> LASSO is present (default)
+ // DOCK#:0 & GPIO40:0 -----------> DOCK is present(option)
#define GPIO_111_SELECT FUNCTION1+NonGpio // USB_OC3#/AC_PRES/TDO/GEVENT15# -> AC_PRES, high active
#define GPIO_112_SELECT FUNCTION2 // USB_OC4#/IR_RX0/GEVENT16# -> ODD_DA, ODD device attention,
- // low active, when it's low, BIOS will enbale ODD_PWR
+ // low active, when it's low, BIOS will enbale ODD_PWR
#define GPIO_113_SELECT FUNCTION2 // USB_OC5#/IR_TX0/GEVENT17# -> use TWARN mapping to trigger GEVENT17#
#define GPIO_114_SELECT FUNCTION2 // BLINK/USB_OC7#/GEVENT18# -> BLINK
#define GPIO_115_SELECT FUNCTION0 // SYS_RESET#/GEVENT19# -> SYS_RST#
@@ -297,7 +297,7 @@
#define GPIO_186_SELECT FUNCTION0+NonGpio // USED AS USB
#define GPIO_187_SELECT FUNCTION2 // USED AS AC LED INDICATOR, LOW ACTIVE
#define GPIO_188_SELECT FUNCTION2 // default used AS BATT LED INDICATOR, LOW ACTIVE
- // option for HDMI CEC signal OW ACTIVE
+ // option for HDMI CEC signal OW ACTIVE
#define GPIO_189_SELECT FUNCTION1 // USED AS AC_OK RECIEVER, INPUT, low active
#define GPIO_190_SELECT FUNCTION1 // USED TO MONITER INTERUPT FROM BATT CHARGER, INPUT
#define GPIO_191_SELECT FUNCTION0+NonGpio // TOUCH PAD, DATA
@@ -307,7 +307,7 @@
#define GPIO_195_SELECT FUNCTION0+NonGpio // SMBUS CLK,
#define GPIO_196_SELECT FUNCTION0+NonGpio // SMBUS, DATA
#define GPIO_197_SELECT FUNCTION2+NonGpio // Default GPIO for LOM_POWER, high active
- // RESERVED FOR LCD BACKLIGHT PWM
+ // RESERVED FOR LCD BACKLIGHT PWM
#define GPIO_198_SELECT FUNCTION0+NonGpio // IMC SCROLL LED CONTROL
#define GPIO_199_SELECT FUNCTION3 // STRAP TO SELECT BOOT ROM - H:LPC ROM L: SPI ROM
#define GPIO_200_SELECT FUNCTION2 // NEC USB3.0 POWER CONTROL 1:ON(DEFAULT); 0:OFF
@@ -1750,547 +1750,547 @@
typedef enum _GPIO_COUNT
{
- GPIO_00 = 0,
- GPIO_01,
- GPIO_02,
- GPIO_03,
- GPIO_04,
- GPIO_05,
- GPIO_06,
- GPIO_07,
- GPIO_08,
- GPIO_09,
- GPIO_10,
- GPIO_11,
- GPIO_12,
- GPIO_13,
- GPIO_14,
- GPIO_15,
- GPIO_16,
- GPIO_17,
- GPIO_18,
- GPIO_19,
- GPIO_20,
- GPIO_21,
- GPIO_22,
- GPIO_23,
- GPIO_24,
- GPIO_25,
- GPIO_26,
- GPIO_27,
- GPIO_28,
- GPIO_29,
- GPIO_30,
- GPIO_31,
- GPIO_32,
- GPIO_33,
- GPIO_34,
- GPIO_35,
- GPIO_36,
- GPIO_37,
- GPIO_38,
- GPIO_39,
- GPIO_40,
- GPIO_41,
- GPIO_42,
- GPIO_43,
- GPIO_44,
- GPIO_45,
- GPIO_46,
- GPIO_47,
- GPIO_48,
- GPIO_49,
- GPIO_50,
- GPIO_51,
- GPIO_52,
- GPIO_53,
- GPIO_54,
- GPIO_55,
- GPIO_56,
- GPIO_57,
- GPIO_58,
- GPIO_59,
- GPIO_60,
- GPIO_61,
- GPIO_62,
- GPIO_63,
- GPIO_64,
- GPIO_65,
- GPIO_66,
- GPIO_67,
- GPIO_68,
- GPIO_69,
- GPIO_70,
- GPIO_71,
- GPIO_72,
- GPIO_73,
- GPIO_74,
- GPIO_75,
- GPIO_76,
- GPIO_77,
- GPIO_78,
- GPIO_79,
- GPIO_80,
- GPIO_81,
- GPIO_82,
- GPIO_83,
- GPIO_84,
- GPIO_85,
- GPIO_86,
- GPIO_87,
- GPIO_88,
- GPIO_89,
- GPIO_90,
- GPIO_91,
- GPIO_92,
- GPIO_93,
- GPIO_94,
- GPIO_95,
- GPIO_96,
- GPIO_97,
- GPIO_98,
- GPIO_99,
- GPIO_100,
- GPIO_101,
- GPIO_102,
- GPIO_103,
- GPIO_104,
- GPIO_105,
- GPIO_106,
- GPIO_107,
- GPIO_108,
- GPIO_109,
- GPIO_110,
- GPIO_111,
- GPIO_112,
- GPIO_113,
- GPIO_114,
- GPIO_115,
- GPIO_116,
- GPIO_117,
- GPIO_118,
- GPIO_119,
- GPIO_120,
- GPIO_121,
- GPIO_122,
- GPIO_123,
- GPIO_124,
- GPIO_125,
- GPIO_126,
- GPIO_127,
- GPIO_128,
- GPIO_129,
- GPIO_130,
- GPIO_131,
- GPIO_132,
- GPIO_133,
- GPIO_134,
- GPIO_135,
- GPIO_136,
- GPIO_137,
- GPIO_138,
- GPIO_139,
- GPIO_140,
- GPIO_141,
- GPIO_142,
- GPIO_143,
- GPIO_144,
- GPIO_145,
- GPIO_146,
- GPIO_147,
- GPIO_148,
- GPIO_149,
- GPIO_150,
- GPIO_151,
- GPIO_152,
- GPIO_153,
- GPIO_154,
- GPIO_155,
- GPIO_156,
- GPIO_157,
- GPIO_158,
- GPIO_159,
- GPIO_160,
- GPIO_161,
- GPIO_162,
- GPIO_163,
- GPIO_164,
- GPIO_165,
- GPIO_166,
- GPIO_167,
- GPIO_168,
- GPIO_169,
- GPIO_170,
- GPIO_171,
- GPIO_172,
- GPIO_173,
- GPIO_174,
- GPIO_175,
- GPIO_176,
- GPIO_177,
- GPIO_178,
- GPIO_179,
- GPIO_180,
- GPIO_181,
- GPIO_182,
- GPIO_183,
- GPIO_184,
- GPIO_185,
- GPIO_186,
- GPIO_187,
- GPIO_188,
- GPIO_189,
- GPIO_190,
- GPIO_191,
- GPIO_192,
- GPIO_193,
- GPIO_194,
- GPIO_195,
- GPIO_196,
- GPIO_197,
- GPIO_198,
- GPIO_199,
- GPIO_200,
- GPIO_201,
- GPIO_202,
- GPIO_203,
- GPIO_204,
- GPIO_205,
- GPIO_206,
- GPIO_207,
- GPIO_208,
- GPIO_209,
- GPIO_210,
- GPIO_211,
- GPIO_212,
- GPIO_213,
- GPIO_214,
- GPIO_215,
- GPIO_216,
- GPIO_217,
- GPIO_218,
- GPIO_219,
- GPIO_220,
- GPIO_221,
- GPIO_222,
- GPIO_223,
- GPIO_224,
- GPIO_225,
- GPIO_226,
- GPIO_227,
- GPIO_228,
- GPIO_229,
- MAX_GPIO_NO
+ GPIO_00 = 0,
+ GPIO_01,
+ GPIO_02,
+ GPIO_03,
+ GPIO_04,
+ GPIO_05,
+ GPIO_06,
+ GPIO_07,
+ GPIO_08,
+ GPIO_09,
+ GPIO_10,
+ GPIO_11,
+ GPIO_12,
+ GPIO_13,
+ GPIO_14,
+ GPIO_15,
+ GPIO_16,
+ GPIO_17,
+ GPIO_18,
+ GPIO_19,
+ GPIO_20,
+ GPIO_21,
+ GPIO_22,
+ GPIO_23,
+ GPIO_24,
+ GPIO_25,
+ GPIO_26,
+ GPIO_27,
+ GPIO_28,
+ GPIO_29,
+ GPIO_30,
+ GPIO_31,
+ GPIO_32,
+ GPIO_33,
+ GPIO_34,
+ GPIO_35,
+ GPIO_36,
+ GPIO_37,
+ GPIO_38,
+ GPIO_39,
+ GPIO_40,
+ GPIO_41,
+ GPIO_42,
+ GPIO_43,
+ GPIO_44,
+ GPIO_45,
+ GPIO_46,
+ GPIO_47,
+ GPIO_48,
+ GPIO_49,
+ GPIO_50,
+ GPIO_51,
+ GPIO_52,
+ GPIO_53,
+ GPIO_54,
+ GPIO_55,
+ GPIO_56,
+ GPIO_57,
+ GPIO_58,
+ GPIO_59,
+ GPIO_60,
+ GPIO_61,
+ GPIO_62,
+ GPIO_63,
+ GPIO_64,
+ GPIO_65,
+ GPIO_66,
+ GPIO_67,
+ GPIO_68,
+ GPIO_69,
+ GPIO_70,
+ GPIO_71,
+ GPIO_72,
+ GPIO_73,
+ GPIO_74,
+ GPIO_75,
+ GPIO_76,
+ GPIO_77,
+ GPIO_78,
+ GPIO_79,
+ GPIO_80,
+ GPIO_81,
+ GPIO_82,
+ GPIO_83,
+ GPIO_84,
+ GPIO_85,
+ GPIO_86,
+ GPIO_87,
+ GPIO_88,
+ GPIO_89,
+ GPIO_90,
+ GPIO_91,
+ GPIO_92,
+ GPIO_93,
+ GPIO_94,
+ GPIO_95,
+ GPIO_96,
+ GPIO_97,
+ GPIO_98,
+ GPIO_99,
+ GPIO_100,
+ GPIO_101,
+ GPIO_102,
+ GPIO_103,
+ GPIO_104,
+ GPIO_105,
+ GPIO_106,
+ GPIO_107,
+ GPIO_108,
+ GPIO_109,
+ GPIO_110,
+ GPIO_111,
+ GPIO_112,
+ GPIO_113,
+ GPIO_114,
+ GPIO_115,
+ GPIO_116,
+ GPIO_117,
+ GPIO_118,
+ GPIO_119,
+ GPIO_120,
+ GPIO_121,
+ GPIO_122,
+ GPIO_123,
+ GPIO_124,
+ GPIO_125,
+ GPIO_126,
+ GPIO_127,
+ GPIO_128,
+ GPIO_129,
+ GPIO_130,
+ GPIO_131,
+ GPIO_132,
+ GPIO_133,
+ GPIO_134,
+ GPIO_135,
+ GPIO_136,
+ GPIO_137,
+ GPIO_138,
+ GPIO_139,
+ GPIO_140,
+ GPIO_141,
+ GPIO_142,
+ GPIO_143,
+ GPIO_144,
+ GPIO_145,
+ GPIO_146,
+ GPIO_147,
+ GPIO_148,
+ GPIO_149,
+ GPIO_150,
+ GPIO_151,
+ GPIO_152,
+ GPIO_153,
+ GPIO_154,
+ GPIO_155,
+ GPIO_156,
+ GPIO_157,
+ GPIO_158,
+ GPIO_159,
+ GPIO_160,
+ GPIO_161,
+ GPIO_162,
+ GPIO_163,
+ GPIO_164,
+ GPIO_165,
+ GPIO_166,
+ GPIO_167,
+ GPIO_168,
+ GPIO_169,
+ GPIO_170,
+ GPIO_171,
+ GPIO_172,
+ GPIO_173,
+ GPIO_174,
+ GPIO_175,
+ GPIO_176,
+ GPIO_177,
+ GPIO_178,
+ GPIO_179,
+ GPIO_180,
+ GPIO_181,
+ GPIO_182,
+ GPIO_183,
+ GPIO_184,
+ GPIO_185,
+ GPIO_186,
+ GPIO_187,
+ GPIO_188,
+ GPIO_189,
+ GPIO_190,
+ GPIO_191,
+ GPIO_192,
+ GPIO_193,
+ GPIO_194,
+ GPIO_195,
+ GPIO_196,
+ GPIO_197,
+ GPIO_198,
+ GPIO_199,
+ GPIO_200,
+ GPIO_201,
+ GPIO_202,
+ GPIO_203,
+ GPIO_204,
+ GPIO_205,
+ GPIO_206,
+ GPIO_207,
+ GPIO_208,
+ GPIO_209,
+ GPIO_210,
+ GPIO_211,
+ GPIO_212,
+ GPIO_213,
+ GPIO_214,
+ GPIO_215,
+ GPIO_216,
+ GPIO_217,
+ GPIO_218,
+ GPIO_219,
+ GPIO_220,
+ GPIO_221,
+ GPIO_222,
+ GPIO_223,
+ GPIO_224,
+ GPIO_225,
+ GPIO_226,
+ GPIO_227,
+ GPIO_228,
+ GPIO_229,
+ MAX_GPIO_NO
} GPIO_COUNT;
typedef struct _GPIO_SETTINGS
{
- u8 select;
- u8 type;
- u8 value;
- u8 NonGpioGevent;
+ u8 select;
+ u8 type;
+ u8 value;
+ u8 NonGpioGevent;
} GPIO_SETTINGS;
const GPIO_SETTINGS gpio_table[]=
{
- {GPIO_00_SELECT, GPIO_00_TYPE, GPO_00_LEVEL+GPIO_00_STICKY+GPIO_00_PULLUP+GPIO_00_PULLDOWN, GPIO_00_SELECT},
- {GPIO_01_SELECT, GPIO_01_TYPE, GPO_01_LEVEL+GPIO_01_STICKY+GPIO_01_PULLUP+GPIO_01_PULLDOWN, GPIO_01_SELECT},
- {GPIO_02_SELECT, GPIO_02_TYPE, GPO_02_LEVEL+GPIO_02_STICKY+GPIO_02_PULLUP+GPIO_02_PULLDOWN, GPIO_02_SELECT},
- {GPIO_03_SELECT, GPIO_03_TYPE, GPO_03_LEVEL+GPIO_03_STICKY+GPIO_03_PULLUP+GPIO_03_PULLDOWN, GPIO_03_SELECT},
- {GPIO_04_SELECT, GPIO_04_TYPE, GPO_04_LEVEL+GPIO_04_STICKY+GPIO_04_PULLUP+GPIO_04_PULLDOWN, GPIO_04_SELECT},
- {GPIO_05_SELECT, GPIO_05_TYPE, GPO_05_LEVEL+GPIO_05_STICKY+GPIO_05_PULLUP+GPIO_05_PULLDOWN, GPIO_05_SELECT},
- {GPIO_06_SELECT, GPIO_06_TYPE, GPO_06_LEVEL+GPIO_06_STICKY+GPIO_06_PULLUP+GPIO_06_PULLDOWN, GPIO_06_SELECT},
- {GPIO_07_SELECT, GPIO_07_TYPE, GPO_07_LEVEL+GPIO_07_STICKY+GPIO_07_PULLUP+GPIO_07_PULLDOWN, GPIO_07_SELECT},
- {GPIO_08_SELECT, GPIO_08_TYPE, GPO_08_LEVEL+GPIO_08_STICKY+GPIO_08_PULLUP+GPIO_08_PULLDOWN, GPIO_08_SELECT},
- {GPIO_09_SELECT, GPIO_09_TYPE, GPO_09_LEVEL+GPIO_09_STICKY+GPIO_09_PULLUP+GPIO_09_PULLDOWN, GPIO_09_SELECT},
- {GPIO_10_SELECT, GPIO_10_TYPE, GPO_10_LEVEL+GPIO_10_STICKY+GPIO_10_PULLUP+GPIO_10_PULLDOWN, GPIO_10_SELECT},
- {GPIO_11_SELECT, GPIO_11_TYPE, GPO_11_LEVEL+GPIO_11_STICKY+GPIO_11_PULLUP+GPIO_11_PULLDOWN, GPIO_11_SELECT},
- {GPIO_12_SELECT, GPIO_12_TYPE, GPO_12_LEVEL+GPIO_12_STICKY+GPIO_12_PULLUP+GPIO_12_PULLDOWN, GPIO_12_SELECT},
- {GPIO_13_SELECT, GPIO_13_TYPE, GPO_13_LEVEL+GPIO_13_STICKY+GPIO_13_PULLUP+GPIO_13_PULLDOWN, GPIO_13_SELECT},
- {GPIO_14_SELECT, GPIO_14_TYPE, GPO_14_LEVEL+GPIO_14_STICKY+GPIO_14_PULLUP+GPIO_14_PULLDOWN, GPIO_14_SELECT},
- {GPIO_15_SELECT, GPIO_15_TYPE, GPO_15_LEVEL+GPIO_15_STICKY+GPIO_15_PULLUP+GPIO_15_PULLDOWN, GPIO_15_SELECT},
- {GPIO_16_SELECT, GPIO_16_TYPE, GPO_16_LEVEL+GPIO_16_STICKY+GPIO_16_PULLUP+GPIO_16_PULLDOWN, GPIO_16_SELECT},
- {GPIO_17_SELECT, GPIO_17_TYPE, GPO_17_LEVEL+GPIO_17_STICKY+GPIO_17_PULLUP+GPIO_17_PULLDOWN, GPIO_17_SELECT},
- {GPIO_18_SELECT, GPIO_18_TYPE, GPO_18_LEVEL+GPIO_18_STICKY+GPIO_18_PULLUP+GPIO_18_PULLDOWN, GPIO_18_SELECT},
- {GPIO_19_SELECT, GPIO_19_TYPE, GPO_19_LEVEL+GPIO_19_STICKY+GPIO_19_PULLUP+GPIO_19_PULLDOWN, GPIO_19_SELECT},
- {GPIO_20_SELECT, GPIO_20_TYPE, GPO_20_LEVEL+GPIO_20_STICKY+GPIO_20_PULLUP+GPIO_20_PULLDOWN, GPIO_20_SELECT},
- {GPIO_21_SELECT, GPIO_21_TYPE, GPO_21_LEVEL+GPIO_21_STICKY+GPIO_21_PULLUP+GPIO_21_PULLDOWN, GPIO_21_SELECT},
- {GPIO_22_SELECT, GPIO_22_TYPE, GPO_22_LEVEL+GPIO_22_STICKY+GPIO_22_PULLUP+GPIO_22_PULLDOWN, GPIO_22_SELECT},
- {GPIO_23_SELECT, GPIO_23_TYPE, GPO_23_LEVEL+GPIO_23_STICKY+GPIO_23_PULLUP+GPIO_23_PULLDOWN, GPIO_23_SELECT},
- {GPIO_24_SELECT, GPIO_24_TYPE, GPO_24_LEVEL+GPIO_24_STICKY+GPIO_24_PULLUP+GPIO_24_PULLDOWN, GPIO_24_SELECT},
- {GPIO_25_SELECT, GPIO_25_TYPE, GPO_25_LEVEL+GPIO_25_STICKY+GPIO_25_PULLUP+GPIO_25_PULLDOWN, GPIO_25_SELECT},
- {GPIO_26_SELECT, GPIO_26_TYPE, GPO_26_LEVEL+GPIO_26_STICKY+GPIO_26_PULLUP+GPIO_26_PULLDOWN, GPIO_26_SELECT},
- {GPIO_27_SELECT, GPIO_27_TYPE, GPO_27_LEVEL+GPIO_27_STICKY+GPIO_27_PULLUP+GPIO_27_PULLDOWN, GPIO_27_SELECT},
- {GPIO_28_SELECT, GPIO_28_TYPE, GPO_28_LEVEL+GPIO_28_STICKY+GPIO_28_PULLUP+GPIO_28_PULLDOWN, GPIO_28_SELECT},
- {GPIO_29_SELECT, GPIO_29_TYPE, GPO_29_LEVEL+GPIO_29_STICKY+GPIO_29_PULLUP+GPIO_29_PULLDOWN, GPIO_29_SELECT},
- {GPIO_30_SELECT, GPIO_30_TYPE, GPO_30_LEVEL+GPIO_30_STICKY+GPIO_30_PULLUP+GPIO_30_PULLDOWN, GPIO_30_SELECT},
- {GPIO_31_SELECT, GPIO_31_TYPE, GPO_31_LEVEL+GPIO_31_STICKY+GPIO_31_PULLUP+GPIO_31_PULLDOWN, GPIO_31_SELECT},
- {GPIO_32_SELECT, GPIO_32_TYPE, GPO_32_LEVEL+GPIO_32_STICKY+GPIO_32_PULLUP+GPIO_32_PULLDOWN, GPIO_32_SELECT},
- {GPIO_33_SELECT, GPIO_33_TYPE, GPO_33_LEVEL+GPIO_33_STICKY+GPIO_33_PULLUP+GPIO_33_PULLDOWN, GPIO_33_SELECT},
- {GPIO_34_SELECT, GPIO_34_TYPE, GPO_34_LEVEL+GPIO_34_STICKY+GPIO_34_PULLUP+GPIO_34_PULLDOWN, GPIO_34_SELECT},
- {GPIO_35_SELECT, GPIO_35_TYPE, GPO_35_LEVEL+GPIO_35_STICKY+GPIO_35_PULLUP+GPIO_35_PULLDOWN, GPIO_35_SELECT},
- {GPIO_36_SELECT, GPIO_36_TYPE, GPO_36_LEVEL+GPIO_36_STICKY+GPIO_36_PULLUP+GPIO_36_PULLDOWN, GPIO_36_SELECT},
- {GPIO_37_SELECT, GPIO_37_TYPE, GPO_37_LEVEL+GPIO_37_STICKY+GPIO_37_PULLUP+GPIO_37_PULLDOWN, GPIO_37_SELECT},
- {GPIO_38_SELECT, GPIO_38_TYPE, GPO_38_LEVEL+GPIO_38_STICKY+GPIO_38_PULLUP+GPIO_38_PULLDOWN, GPIO_38_SELECT},
- {GPIO_39_SELECT, GPIO_39_TYPE, GPO_39_LEVEL+GPIO_39_STICKY+GPIO_39_PULLUP+GPIO_39_PULLDOWN, GPIO_39_SELECT},
- {GPIO_40_SELECT, GPIO_40_TYPE, GPO_40_LEVEL+GPIO_40_STICKY+GPIO_40_PULLUP+GPIO_40_PULLDOWN, GPIO_40_SELECT},
- {GPIO_41_SELECT, GPIO_41_TYPE, GPO_41_LEVEL+GPIO_41_STICKY+GPIO_41_PULLUP+GPIO_41_PULLDOWN, GPIO_41_SELECT},
- {GPIO_42_SELECT, GPIO_42_TYPE, GPO_42_LEVEL+GPIO_42_STICKY+GPIO_42_PULLUP+GPIO_42_PULLDOWN, GPIO_42_SELECT},
- {GPIO_43_SELECT, GPIO_43_TYPE, GPO_43_LEVEL+GPIO_43_STICKY+GPIO_43_PULLUP+GPIO_43_PULLDOWN, GPIO_43_SELECT},
- {GPIO_44_SELECT, GPIO_44_TYPE, GPO_44_LEVEL+GPIO_44_STICKY+GPIO_44_PULLUP+GPIO_44_PULLDOWN, GPIO_44_SELECT},
- {GPIO_45_SELECT, GPIO_45_TYPE, GPO_45_LEVEL+GPIO_45_STICKY+GPIO_45_PULLUP+GPIO_45_PULLDOWN, GPIO_45_SELECT},
- {GPIO_46_SELECT, GPIO_46_TYPE, GPO_46_LEVEL+GPIO_46_STICKY+GPIO_46_PULLUP+GPIO_46_PULLDOWN, GPIO_46_SELECT},
- {GPIO_47_SELECT, GPIO_47_TYPE, GPO_47_LEVEL+GPIO_47_STICKY+GPIO_47_PULLUP+GPIO_47_PULLDOWN, GPIO_47_SELECT},
- {GPIO_48_SELECT, GPIO_48_TYPE, GPO_48_LEVEL+GPIO_48_STICKY+GPIO_48_PULLUP+GPIO_48_PULLDOWN, GPIO_48_SELECT},
- {GPIO_49_SELECT, GPIO_49_TYPE, GPO_49_LEVEL+GPIO_49_STICKY+GPIO_49_PULLUP+GPIO_49_PULLDOWN, GPIO_49_SELECT},
- {GPIO_50_SELECT, GPIO_50_TYPE, GPO_50_LEVEL+GPIO_50_STICKY+GPIO_50_PULLUP+GPIO_50_PULLDOWN, GPIO_50_SELECT},
- {GPIO_51_SELECT, GPIO_51_TYPE, GPO_51_LEVEL+GPIO_51_STICKY+GPIO_51_PULLUP+GPIO_51_PULLDOWN, GPIO_51_SELECT},
- {GPIO_52_SELECT, GPIO_52_TYPE, GPO_52_LEVEL+GPIO_52_STICKY+GPIO_52_PULLUP+GPIO_52_PULLDOWN, GPIO_52_SELECT},
- {GPIO_53_SELECT, GPIO_53_TYPE, GPO_53_LEVEL+GPIO_53_STICKY+GPIO_53_PULLUP+GPIO_53_PULLDOWN, GPIO_53_SELECT},
- {GPIO_54_SELECT, GPIO_54_TYPE, GPO_54_LEVEL+GPIO_54_STICKY+GPIO_54_PULLUP+GPIO_54_PULLDOWN, GPIO_54_SELECT},
- {GPIO_55_SELECT, GPIO_55_TYPE, GPO_55_LEVEL+GPIO_55_STICKY+GPIO_55_PULLUP+GPIO_55_PULLDOWN, GPIO_55_SELECT},
- {GPIO_56_SELECT, GPIO_56_TYPE, GPO_56_LEVEL+GPIO_56_STICKY+GPIO_56_PULLUP+GPIO_56_PULLDOWN, GPIO_56_SELECT},
- {GPIO_57_SELECT, GPIO_57_TYPE, GPO_57_LEVEL+GPIO_57_STICKY+GPIO_57_PULLUP+GPIO_57_PULLDOWN, GPIO_57_SELECT},
- {GPIO_58_SELECT, GPIO_58_TYPE, GPO_58_LEVEL+GPIO_58_STICKY+GPIO_58_PULLUP+GPIO_58_PULLDOWN, GPIO_58_SELECT},
- {GPIO_59_SELECT, GPIO_59_TYPE, GPO_59_LEVEL+GPIO_59_STICKY+GPIO_59_PULLUP+GPIO_59_PULLDOWN, GPIO_59_SELECT},
- {GPIO_60_SELECT, GPIO_60_TYPE, GPO_60_LEVEL+GPIO_60_STICKY+GPIO_60_PULLUP+GPIO_60_PULLDOWN, GPIO_60_SELECT},
- {GPIO_61_SELECT, GPIO_61_TYPE, GPO_61_LEVEL+GPIO_61_STICKY+GPIO_61_PULLUP+GPIO_61_PULLDOWN, GPIO_61_SELECT},
- {GPIO_62_SELECT, GPIO_62_TYPE, GPO_62_LEVEL+GPIO_62_STICKY+GPIO_62_PULLUP+GPIO_62_PULLDOWN, GPIO_62_SELECT},
- {GPIO_63_SELECT, GPIO_63_TYPE, GPO_63_LEVEL+GPIO_63_STICKY+GPIO_63_PULLUP+GPIO_63_PULLDOWN, GPIO_63_SELECT},
- {GPIO_64_SELECT, GPIO_64_TYPE, GPO_64_LEVEL+GPIO_64_STICKY+GPIO_64_PULLUP+GPIO_64_PULLDOWN, GPIO_64_SELECT},
- {GPIO_65_SELECT, GPIO_65_TYPE, GPO_65_LEVEL+GPIO_65_STICKY+GPIO_65_PULLUP+GPIO_65_PULLDOWN, GPIO_65_SELECT},
- {GPIO_66_SELECT, GPIO_66_TYPE, GPO_66_LEVEL+GPIO_66_STICKY+GPIO_66_PULLUP+GPIO_66_PULLDOWN, GPIO_66_SELECT},
- {GPIO_67_SELECT, GPIO_67_TYPE, GPO_67_LEVEL+GPIO_67_STICKY+GPIO_67_PULLUP+GPIO_67_PULLDOWN, GPIO_67_SELECT},
- {GPIO_68_SELECT, GPIO_68_TYPE, GPO_68_LEVEL+GPIO_68_STICKY+GPIO_68_PULLUP+GPIO_68_PULLDOWN, GPIO_68_SELECT},
- {GPIO_69_SELECT, GPIO_69_TYPE, GPO_69_LEVEL+GPIO_69_STICKY+GPIO_69_PULLUP+GPIO_69_PULLDOWN, GPIO_69_SELECT},
- {GPIO_70_SELECT, GPIO_70_TYPE, GPO_70_LEVEL+GPIO_70_STICKY+GPIO_70_PULLUP+GPIO_70_PULLDOWN, GPIO_70_SELECT},
- {GPIO_71_SELECT, GPIO_71_TYPE, GPO_71_LEVEL+GPIO_71_STICKY+GPIO_71_PULLUP+GPIO_71_PULLDOWN, GPIO_71_SELECT},
- {GPIO_72_SELECT, GPIO_72_TYPE, GPO_72_LEVEL+GPIO_72_STICKY+GPIO_72_PULLUP+GPIO_72_PULLDOWN, GPIO_72_SELECT},
- {GPIO_73_SELECT, GPIO_73_TYPE, GPO_73_LEVEL+GPIO_73_STICKY+GPIO_73_PULLUP+GPIO_73_PULLDOWN, GPIO_73_SELECT},
- {GPIO_74_SELECT, GPIO_74_TYPE, GPO_74_LEVEL+GPIO_74_STICKY+GPIO_74_PULLUP+GPIO_74_PULLDOWN, GPIO_74_SELECT},
- {GPIO_75_SELECT, GPIO_75_TYPE, GPO_75_LEVEL+GPIO_75_STICKY+GPIO_75_PULLUP+GPIO_75_PULLDOWN, GPIO_75_SELECT},
- {GPIO_76_SELECT, GPIO_76_TYPE, GPO_76_LEVEL+GPIO_76_STICKY+GPIO_76_PULLUP+GPIO_76_PULLDOWN, GPIO_76_SELECT},
- {GPIO_77_SELECT, GPIO_77_TYPE, GPO_77_LEVEL+GPIO_77_STICKY+GPIO_77_PULLUP+GPIO_77_PULLDOWN, GPIO_77_SELECT},
- {GPIO_78_SELECT, GPIO_78_TYPE, GPO_78_LEVEL+GPIO_78_STICKY+GPIO_78_PULLUP+GPIO_78_PULLDOWN, GPIO_78_SELECT},
- {GPIO_79_SELECT, GPIO_79_TYPE, GPO_79_LEVEL+GPIO_79_STICKY+GPIO_79_PULLUP+GPIO_79_PULLDOWN, GPIO_79_SELECT},
- {GPIO_80_SELECT, GPIO_80_TYPE, GPO_80_LEVEL+GPIO_80_STICKY+GPIO_80_PULLUP+GPIO_80_PULLDOWN, GPIO_80_SELECT},
- {GPIO_81_SELECT, GPIO_81_TYPE, GPO_81_LEVEL+GPIO_81_STICKY+GPIO_81_PULLUP+GPIO_81_PULLDOWN, GPIO_81_SELECT},
- {GPIO_82_SELECT, GPIO_82_TYPE, GPO_82_LEVEL+GPIO_82_STICKY+GPIO_82_PULLUP+GPIO_82_PULLDOWN, GPIO_82_SELECT},
- {GPIO_83_SELECT, GPIO_83_TYPE, GPO_83_LEVEL+GPIO_83_STICKY+GPIO_83_PULLUP+GPIO_83_PULLDOWN, GPIO_83_SELECT},
- {GPIO_84_SELECT, GPIO_84_TYPE, GPO_84_LEVEL+GPIO_84_STICKY+GPIO_84_PULLUP+GPIO_84_PULLDOWN, GPIO_84_SELECT},
- {GPIO_85_SELECT, GPIO_85_TYPE, GPO_85_LEVEL+GPIO_85_STICKY+GPIO_85_PULLUP+GPIO_85_PULLDOWN, GPIO_85_SELECT},
- {GPIO_86_SELECT, GPIO_86_TYPE, GPO_86_LEVEL+GPIO_86_STICKY+GPIO_86_PULLUP+GPIO_86_PULLDOWN, GPIO_86_SELECT},
- {GPIO_87_SELECT, GPIO_87_TYPE, GPO_87_LEVEL+GPIO_87_STICKY+GPIO_87_PULLUP+GPIO_87_PULLDOWN, GPIO_87_SELECT},
- {GPIO_88_SELECT, GPIO_88_TYPE, GPO_88_LEVEL+GPIO_88_STICKY+GPIO_88_PULLUP+GPIO_88_PULLDOWN, GPIO_88_SELECT},
- {GPIO_89_SELECT, GPIO_89_TYPE, GPO_89_LEVEL+GPIO_89_STICKY+GPIO_89_PULLUP+GPIO_89_PULLDOWN, GPIO_89_SELECT},
- {GPIO_90_SELECT, GPIO_90_TYPE, GPO_90_LEVEL+GPIO_90_STICKY+GPIO_90_PULLUP+GPIO_90_PULLDOWN, GPIO_90_SELECT},
- {GPIO_91_SELECT, GPIO_91_TYPE, GPO_91_LEVEL+GPIO_91_STICKY+GPIO_91_PULLUP+GPIO_91_PULLDOWN, GPIO_91_SELECT},
- {GPIO_92_SELECT, GPIO_92_TYPE, GPO_92_LEVEL+GPIO_92_STICKY+GPIO_92_PULLUP+GPIO_92_PULLDOWN, GPIO_92_SELECT},
- {GPIO_93_SELECT, GPIO_93_TYPE, GPO_93_LEVEL+GPIO_93_STICKY+GPIO_93_PULLUP+GPIO_93_PULLDOWN, GPIO_93_SELECT},
- {GPIO_94_SELECT, GPIO_94_TYPE, GPO_94_LEVEL+GPIO_94_STICKY+GPIO_94_PULLUP+GPIO_94_PULLDOWN, GPIO_94_SELECT},
- {GPIO_95_SELECT, GPIO_95_TYPE, GPO_95_LEVEL+GPIO_95_STICKY+GPIO_95_PULLUP+GPIO_95_PULLDOWN, GPIO_95_SELECT},
- {GPIO_96_SELECT, GPIO_96_TYPE, GPO_96_LEVEL+GPIO_96_STICKY+GPIO_96_PULLUP+GPIO_96_PULLDOWN, GPIO_96_SELECT},
- {GPIO_97_SELECT, GPIO_97_TYPE, GPO_97_LEVEL+GPIO_97_STICKY+GPIO_97_PULLUP+GPIO_97_PULLDOWN, GPIO_97_SELECT},
- {GPIO_98_SELECT, GPIO_98_TYPE, GPO_98_LEVEL+GPIO_98_STICKY+GPIO_98_PULLUP+GPIO_98_PULLDOWN, GPIO_98_SELECT},
- {GPIO_99_SELECT, GPIO_99_TYPE, GPO_99_LEVEL+GPIO_99_STICKY+GPIO_99_PULLUP+GPIO_99_PULLDOWN, GPIO_99_SELECT},
- {GPIO_100_SELECT, GPIO_100_TYPE, GPO_100_LEVEL+GPIO_100_STICKY+GPIO_100_PULLUP+GPIO_100_PULLDOWN, GPIO_100_SELECT},
- {GPIO_101_SELECT, GPIO_101_TYPE, GPO_101_LEVEL+GPIO_101_STICKY+GPIO_101_PULLUP+GPIO_101_PULLDOWN, GPIO_101_SELECT},
- {GPIO_102_SELECT, GPIO_102_TYPE, GPO_102_LEVEL+GPIO_102_STICKY+GPIO_102_PULLUP+GPIO_102_PULLDOWN, GPIO_102_SELECT},
- {GPIO_103_SELECT, GPIO_103_TYPE, GPO_103_LEVEL+GPIO_103_STICKY+GPIO_103_PULLUP+GPIO_103_PULLDOWN, GPIO_103_SELECT},
- {GPIO_104_SELECT, GPIO_104_TYPE, GPO_104_LEVEL+GPIO_104_STICKY+GPIO_104_PULLUP+GPIO_104_PULLDOWN, GPIO_104_SELECT},
- {GPIO_105_SELECT, GPIO_105_TYPE, GPO_105_LEVEL+GPIO_105_STICKY+GPIO_105_PULLUP+GPIO_105_PULLDOWN, GPIO_105_SELECT},
- {GPIO_106_SELECT, GPIO_106_TYPE, GPO_106_LEVEL+GPIO_106_STICKY+GPIO_106_PULLUP+GPIO_106_PULLDOWN, GPIO_106_SELECT},
- {GPIO_107_SELECT, GPIO_107_TYPE, GPO_107_LEVEL+GPIO_107_STICKY+GPIO_107_PULLUP+GPIO_107_PULLDOWN, GPIO_107_SELECT},
- {GPIO_108_SELECT, GPIO_108_TYPE, GPO_108_LEVEL+GPIO_108_STICKY+GPIO_108_PULLUP+GPIO_108_PULLDOWN, GPIO_108_SELECT},
- {GPIO_109_SELECT, GPIO_109_TYPE, GPO_109_LEVEL+GPIO_109_STICKY+GPIO_109_PULLUP+GPIO_109_PULLDOWN, GPIO_109_SELECT},
- {GPIO_110_SELECT, GPIO_110_TYPE, GPO_110_LEVEL+GPIO_110_STICKY+GPIO_110_PULLUP+GPIO_110_PULLDOWN, GPIO_110_SELECT},
- {GPIO_111_SELECT, GPIO_111_TYPE, GPO_111_LEVEL+GPIO_111_STICKY+GPIO_111_PULLUP+GPIO_111_PULLDOWN, GPIO_111_SELECT},
- {GPIO_112_SELECT, GPIO_112_TYPE, GPO_112_LEVEL+GPIO_112_STICKY+GPIO_112_PULLUP+GPIO_112_PULLDOWN, GPIO_112_SELECT},
- {GPIO_113_SELECT, GPIO_113_TYPE, GPO_113_LEVEL+GPIO_113_STICKY+GPIO_113_PULLUP+GPIO_113_PULLDOWN, GPIO_113_SELECT},
- {GPIO_114_SELECT, GPIO_114_TYPE, GPO_114_LEVEL+GPIO_114_STICKY+GPIO_114_PULLUP+GPIO_114_PULLDOWN, GPIO_114_SELECT},
- {GPIO_115_SELECT, GPIO_115_TYPE, GPO_115_LEVEL+GPIO_115_STICKY+GPIO_115_PULLUP+GPIO_115_PULLDOWN, GPIO_115_SELECT},
- {GPIO_116_SELECT, GPIO_116_TYPE, GPO_116_LEVEL+GPIO_116_STICKY+GPIO_116_PULLUP+GPIO_116_PULLDOWN, GPIO_116_SELECT},
- {GPIO_117_SELECT, GPIO_117_TYPE, GPO_117_LEVEL+GPIO_117_STICKY+GPIO_117_PULLUP+GPIO_117_PULLDOWN, GPIO_117_SELECT},
- {GPIO_118_SELECT, GPIO_118_TYPE, GPO_118_LEVEL+GPIO_118_STICKY+GPIO_118_PULLUP+GPIO_118_PULLDOWN, GPIO_118_SELECT},
- {GPIO_119_SELECT, GPIO_119_TYPE, GPO_119_LEVEL+GPIO_119_STICKY+GPIO_119_PULLUP+GPIO_119_PULLDOWN, GPIO_119_SELECT},
- {GPIO_120_SELECT, GPIO_120_TYPE, GPO_120_LEVEL+GPIO_120_STICKY+GPIO_120_PULLUP+GPIO_120_PULLDOWN, GPIO_120_SELECT},
- {GPIO_121_SELECT, GPIO_121_TYPE, GPO_121_LEVEL+GPIO_121_STICKY+GPIO_121_PULLUP+GPIO_121_PULLDOWN, GPIO_121_SELECT},
- {GPIO_122_SELECT, GPIO_122_TYPE, GPO_122_LEVEL+GPIO_122_STICKY+GPIO_122_PULLUP+GPIO_122_PULLDOWN, GPIO_122_SELECT},
- {GPIO_123_SELECT, GPIO_123_TYPE, GPO_123_LEVEL+GPIO_123_STICKY+GPIO_123_PULLUP+GPIO_123_PULLDOWN, GPIO_123_SELECT},
- {GPIO_124_SELECT, GPIO_124_TYPE, GPO_124_LEVEL+GPIO_124_STICKY+GPIO_124_PULLUP+GPIO_124_PULLDOWN, GPIO_124_SELECT},
- {GPIO_125_SELECT, GPIO_125_TYPE, GPO_125_LEVEL+GPIO_125_STICKY+GPIO_125_PULLUP+GPIO_125_PULLDOWN, GPIO_125_SELECT},
- {GPIO_126_SELECT, GPIO_126_TYPE, GPO_126_LEVEL+GPIO_126_STICKY+GPIO_126_PULLUP+GPIO_126_PULLDOWN, GPIO_126_SELECT},
- {GPIO_127_SELECT, GPIO_127_TYPE, GPO_127_LEVEL+GPIO_127_STICKY+GPIO_127_PULLUP+GPIO_127_PULLDOWN, GPIO_127_SELECT},
- {GPIO_128_SELECT, GPIO_128_TYPE, GPO_128_LEVEL+GPIO_128_STICKY+GPIO_128_PULLUP+GPIO_128_PULLDOWN, GPIO_128_SELECT},
- {GPIO_129_SELECT, GPIO_129_TYPE, GPO_129_LEVEL+GPIO_129_STICKY+GPIO_129_PULLUP+GPIO_129_PULLDOWN, GPIO_129_SELECT},
- {GPIO_130_SELECT, GPIO_130_TYPE, GPO_130_LEVEL+GPIO_130_STICKY+GPIO_130_PULLUP+GPIO_130_PULLDOWN, GPIO_130_SELECT},
- {GPIO_131_SELECT, GPIO_131_TYPE, GPO_131_LEVEL+GPIO_131_STICKY+GPIO_131_PULLUP+GPIO_131_PULLDOWN, GPIO_131_SELECT},
- {GPIO_132_SELECT, GPIO_132_TYPE, GPO_132_LEVEL+GPIO_132_STICKY+GPIO_132_PULLUP+GPIO_132_PULLDOWN, GPIO_132_SELECT},
- {GPIO_133_SELECT, GPIO_133_TYPE, GPO_133_LEVEL+GPIO_133_STICKY+GPIO_133_PULLUP+GPIO_133_PULLDOWN, GPIO_133_SELECT},
- {GPIO_134_SELECT, GPIO_134_TYPE, GPO_134_LEVEL+GPIO_134_STICKY+GPIO_134_PULLUP+GPIO_134_PULLDOWN, GPIO_134_SELECT},
- {GPIO_135_SELECT, GPIO_135_TYPE, GPO_135_LEVEL+GPIO_135_STICKY+GPIO_135_PULLUP+GPIO_135_PULLDOWN, GPIO_135_SELECT},
- {GPIO_136_SELECT, GPIO_136_TYPE, GPO_136_LEVEL+GPIO_136_STICKY+GPIO_136_PULLUP+GPIO_136_PULLDOWN, GPIO_136_SELECT},
- {GPIO_137_SELECT, GPIO_137_TYPE, GPO_137_LEVEL+GPIO_137_STICKY+GPIO_137_PULLUP+GPIO_137_PULLDOWN, GPIO_137_SELECT},
- {GPIO_138_SELECT, GPIO_138_TYPE, GPO_138_LEVEL+GPIO_138_STICKY+GPIO_138_PULLUP+GPIO_138_PULLDOWN, GPIO_138_SELECT},
- {GPIO_139_SELECT, GPIO_139_TYPE, GPO_139_LEVEL+GPIO_139_STICKY+GPIO_139_PULLUP+GPIO_139_PULLDOWN, GPIO_139_SELECT},
- {GPIO_140_SELECT, GPIO_140_TYPE, GPO_140_LEVEL+GPIO_140_STICKY+GPIO_140_PULLUP+GPIO_140_PULLDOWN, GPIO_140_SELECT},
- {GPIO_141_SELECT, GPIO_141_TYPE, GPO_141_LEVEL+GPIO_141_STICKY+GPIO_141_PULLUP+GPIO_141_PULLDOWN, GPIO_141_SELECT},
- {GPIO_142_SELECT, GPIO_142_TYPE, GPO_142_LEVEL+GPIO_142_STICKY+GPIO_142_PULLUP+GPIO_142_PULLDOWN, GPIO_142_SELECT},
- {GPIO_143_SELECT, GPIO_143_TYPE, GPO_143_LEVEL+GPIO_143_STICKY+GPIO_143_PULLUP+GPIO_143_PULLDOWN, GPIO_143_SELECT},
- {GPIO_144_SELECT, GPIO_144_TYPE, GPO_144_LEVEL+GPIO_144_STICKY+GPIO_144_PULLUP+GPIO_144_PULLDOWN, GPIO_144_SELECT},
- {GPIO_145_SELECT, GPIO_145_TYPE, GPO_145_LEVEL+GPIO_145_STICKY+GPIO_145_PULLUP+GPIO_145_PULLDOWN, GPIO_145_SELECT},
- {GPIO_146_SELECT, GPIO_146_TYPE, GPO_146_LEVEL+GPIO_146_STICKY+GPIO_146_PULLUP+GPIO_146_PULLDOWN, GPIO_146_SELECT},
- {GPIO_147_SELECT, GPIO_147_TYPE, GPO_147_LEVEL+GPIO_147_STICKY+GPIO_147_PULLUP+GPIO_147_PULLDOWN, GPIO_147_SELECT},
- {GPIO_148_SELECT, GPIO_148_TYPE, GPO_148_LEVEL+GPIO_148_STICKY+GPIO_148_PULLUP+GPIO_148_PULLDOWN, GPIO_148_SELECT},
- {GPIO_149_SELECT, GPIO_149_TYPE, GPO_149_LEVEL+GPIO_149_STICKY+GPIO_149_PULLUP+GPIO_149_PULLDOWN, GPIO_149_SELECT},
- {GPIO_150_SELECT, GPIO_150_TYPE, GPO_150_LEVEL+GPIO_150_STICKY+GPIO_150_PULLUP+GPIO_150_PULLDOWN, GPIO_150_SELECT},
- {GPIO_151_SELECT, GPIO_151_TYPE, GPO_151_LEVEL+GPIO_151_STICKY+GPIO_151_PULLUP+GPIO_151_PULLDOWN, GPIO_151_SELECT},
- {GPIO_152_SELECT, GPIO_152_TYPE, GPO_152_LEVEL+GPIO_152_STICKY+GPIO_152_PULLUP+GPIO_152_PULLDOWN, GPIO_152_SELECT},
- {GPIO_153_SELECT, GPIO_153_TYPE, GPO_153_LEVEL+GPIO_153_STICKY+GPIO_153_PULLUP+GPIO_153_PULLDOWN, GPIO_153_SELECT},
- {GPIO_154_SELECT, GPIO_154_TYPE, GPO_154_LEVEL+GPIO_154_STICKY+GPIO_154_PULLUP+GPIO_154_PULLDOWN, GPIO_154_SELECT},
- {GPIO_155_SELECT, GPIO_155_TYPE, GPO_155_LEVEL+GPIO_155_STICKY+GPIO_155_PULLUP+GPIO_155_PULLDOWN, GPIO_155_SELECT},
- {GPIO_156_SELECT, GPIO_156_TYPE, GPO_156_LEVEL+GPIO_156_STICKY+GPIO_156_PULLUP+GPIO_156_PULLDOWN, GPIO_156_SELECT},
- {GPIO_157_SELECT, GPIO_157_TYPE, GPO_157_LEVEL+GPIO_157_STICKY+GPIO_157_PULLUP+GPIO_157_PULLDOWN, GPIO_157_SELECT},
- {GPIO_158_SELECT, GPIO_158_TYPE, GPO_158_LEVEL+GPIO_158_STICKY+GPIO_158_PULLUP+GPIO_158_PULLDOWN, GPIO_158_SELECT},
- {GPIO_159_SELECT, GPIO_159_TYPE, GPO_159_LEVEL+GPIO_159_STICKY+GPIO_159_PULLUP+GPIO_159_PULLDOWN, GPIO_159_SELECT},
- {GPIO_160_SELECT, GPIO_160_TYPE, GPO_160_LEVEL+GPIO_160_STICKY+GPIO_160_PULLUP+GPIO_160_PULLDOWN, GPIO_160_SELECT},
- {GPIO_161_SELECT, GPIO_161_TYPE, GPO_161_LEVEL+GPIO_161_STICKY+GPIO_161_PULLUP+GPIO_161_PULLDOWN, GPIO_161_SELECT},
- {GPIO_162_SELECT, GPIO_162_TYPE, GPO_162_LEVEL+GPIO_162_STICKY+GPIO_162_PULLUP+GPIO_162_PULLDOWN, GPIO_162_SELECT},
- {GPIO_163_SELECT, GPIO_163_TYPE, GPO_163_LEVEL+GPIO_163_STICKY+GPIO_163_PULLUP+GPIO_163_PULLDOWN, GPIO_163_SELECT},
- {GPIO_164_SELECT, GPIO_164_TYPE, GPO_164_LEVEL+GPIO_164_STICKY+GPIO_164_PULLUP+GPIO_164_PULLDOWN, GPIO_164_SELECT},
- {GPIO_165_SELECT, GPIO_165_TYPE, GPO_165_LEVEL+GPIO_165_STICKY+GPIO_165_PULLUP+GPIO_165_PULLDOWN, GPIO_165_SELECT},
- {GPIO_166_SELECT, GPIO_166_TYPE, GPO_166_LEVEL+GPIO_166_STICKY+GPIO_166_PULLUP+GPIO_166_PULLDOWN, GPIO_166_SELECT},
- {GPIO_167_SELECT, GPIO_167_TYPE, GPO_167_LEVEL+GPIO_167_STICKY+GPIO_167_PULLUP+GPIO_167_PULLDOWN, GPIO_167_SELECT},
- {GPIO_168_SELECT, GPIO_168_TYPE, GPO_168_LEVEL+GPIO_168_STICKY+GPIO_168_PULLUP+GPIO_168_PULLDOWN, GPIO_168_SELECT},
- {GPIO_169_SELECT, GPIO_169_TYPE, GPO_169_LEVEL+GPIO_169_STICKY+GPIO_169_PULLUP+GPIO_169_PULLDOWN, GPIO_169_SELECT},
- {GPIO_170_SELECT, GPIO_170_TYPE, GPO_170_LEVEL+GPIO_170_STICKY+GPIO_170_PULLUP+GPIO_170_PULLDOWN, GPIO_170_SELECT},
- {GPIO_171_SELECT, GPIO_171_TYPE, GPO_171_LEVEL+GPIO_171_STICKY+GPIO_171_PULLUP+GPIO_171_PULLDOWN, GPIO_171_SELECT},
- {GPIO_172_SELECT, GPIO_172_TYPE, GPO_172_LEVEL+GPIO_172_STICKY+GPIO_172_PULLUP+GPIO_172_PULLDOWN, GPIO_172_SELECT},
- {GPIO_173_SELECT, GPIO_173_TYPE, GPO_173_LEVEL+GPIO_173_STICKY+GPIO_173_PULLUP+GPIO_173_PULLDOWN, GPIO_173_SELECT},
- {GPIO_174_SELECT, GPIO_174_TYPE, GPO_174_LEVEL+GPIO_174_STICKY+GPIO_174_PULLUP+GPIO_174_PULLDOWN, GPIO_174_SELECT},
- {GPIO_175_SELECT, GPIO_175_TYPE, GPO_175_LEVEL+GPIO_175_STICKY+GPIO_175_PULLUP+GPIO_175_PULLDOWN, GPIO_175_SELECT},
- {GPIO_176_SELECT, GPIO_176_TYPE, GPO_176_LEVEL+GPIO_176_STICKY+GPIO_176_PULLUP+GPIO_176_PULLDOWN, GPIO_176_SELECT},
- {GPIO_177_SELECT, GPIO_177_TYPE, GPO_177_LEVEL+GPIO_177_STICKY+GPIO_177_PULLUP+GPIO_177_PULLDOWN, GPIO_177_SELECT},
- {GPIO_178_SELECT, GPIO_178_TYPE, GPO_178_LEVEL+GPIO_178_STICKY+GPIO_178_PULLUP+GPIO_178_PULLDOWN, GPIO_178_SELECT},
- {GPIO_179_SELECT, GPIO_179_TYPE, GPO_179_LEVEL+GPIO_179_STICKY+GPIO_179_PULLUP+GPIO_179_PULLDOWN, GPIO_179_SELECT},
- {GPIO_180_SELECT, GPIO_180_TYPE, GPO_180_LEVEL+GPIO_180_STICKY+GPIO_180_PULLUP+GPIO_180_PULLDOWN, GPIO_180_SELECT},
- {GPIO_181_SELECT, GPIO_181_TYPE, GPO_181_LEVEL+GPIO_181_STICKY+GPIO_181_PULLUP+GPIO_181_PULLDOWN, GPIO_181_SELECT},
- {GPIO_182_SELECT, GPIO_182_TYPE, GPO_182_LEVEL+GPIO_182_STICKY+GPIO_182_PULLUP+GPIO_182_PULLDOWN, GPIO_182_SELECT},
- {GPIO_183_SELECT, GPIO_183_TYPE, GPO_183_LEVEL+GPIO_183_STICKY+GPIO_183_PULLUP+GPIO_183_PULLDOWN, GPIO_183_SELECT},
- {GPIO_184_SELECT, GPIO_184_TYPE, GPO_184_LEVEL+GPIO_184_STICKY+GPIO_184_PULLUP+GPIO_184_PULLDOWN, GPIO_184_SELECT},
- {GPIO_185_SELECT, GPIO_185_TYPE, GPO_185_LEVEL+GPIO_185_STICKY+GPIO_185_PULLUP+GPIO_185_PULLDOWN, GPIO_185_SELECT},
- {GPIO_186_SELECT, GPIO_186_TYPE, GPO_186_LEVEL+GPIO_186_STICKY+GPIO_186_PULLUP+GPIO_186_PULLDOWN, GPIO_186_SELECT},
- {GPIO_187_SELECT, GPIO_187_TYPE, GPO_187_LEVEL+GPIO_187_STICKY+GPIO_187_PULLUP+GPIO_187_PULLDOWN, GPIO_187_SELECT},
- {GPIO_188_SELECT, GPIO_188_TYPE, GPO_188_LEVEL+GPIO_188_STICKY+GPIO_188_PULLUP+GPIO_188_PULLDOWN, GPIO_188_SELECT},
- {GPIO_189_SELECT, GPIO_189_TYPE, GPO_189_LEVEL+GPIO_189_STICKY+GPIO_189_PULLUP+GPIO_189_PULLDOWN, GPIO_189_SELECT},
- {GPIO_190_SELECT, GPIO_190_TYPE, GPO_190_LEVEL+GPIO_190_STICKY+GPIO_190_PULLUP+GPIO_190_PULLDOWN, GPIO_190_SELECT},
- {GPIO_191_SELECT, GPIO_191_TYPE, GPO_191_LEVEL+GPIO_191_STICKY+GPIO_191_PULLUP+GPIO_191_PULLDOWN, GPIO_191_SELECT},
- {GPIO_192_SELECT, GPIO_192_TYPE, GPO_192_LEVEL+GPIO_192_STICKY+GPIO_192_PULLUP+GPIO_192_PULLDOWN, GPIO_192_SELECT},
- {GPIO_193_SELECT, GPIO_193_TYPE, GPO_193_LEVEL+GPIO_193_STICKY+GPIO_193_PULLUP+GPIO_193_PULLDOWN, GPIO_193_SELECT},
- {GPIO_194_SELECT, GPIO_194_TYPE, GPO_194_LEVEL+GPIO_194_STICKY+GPIO_194_PULLUP+GPIO_194_PULLDOWN, GPIO_194_SELECT},
- {GPIO_195_SELECT, GPIO_195_TYPE, GPO_195_LEVEL+GPIO_195_STICKY+GPIO_195_PULLUP+GPIO_195_PULLDOWN, GPIO_195_SELECT},
- {GPIO_196_SELECT, GPIO_196_TYPE, GPO_196_LEVEL+GPIO_196_STICKY+GPIO_196_PULLUP+GPIO_196_PULLDOWN, GPIO_196_SELECT},
- {GPIO_197_SELECT, GPIO_197_TYPE, GPO_197_LEVEL+GPIO_197_STICKY+GPIO_197_PULLUP+GPIO_197_PULLDOWN, GPIO_197_SELECT},
- {GPIO_198_SELECT, GPIO_198_TYPE, GPO_198_LEVEL+GPIO_198_STICKY+GPIO_198_PULLUP+GPIO_198_PULLDOWN, GPIO_198_SELECT},
- {GPIO_199_SELECT, GPIO_199_TYPE, GPO_199_LEVEL+GPIO_199_STICKY+GPIO_199_PULLUP+GPIO_199_PULLDOWN, GPIO_199_SELECT},
- {GPIO_200_SELECT, GPIO_200_TYPE, GPO_200_LEVEL+GPIO_200_STICKY+GPIO_200_PULLUP+GPIO_200_PULLDOWN, GPIO_200_SELECT},
- {GPIO_201_SELECT, GPIO_201_TYPE, GPO_201_LEVEL+GPIO_201_STICKY+GPIO_201_PULLUP+GPIO_201_PULLDOWN, GPIO_201_SELECT},
- {GPIO_202_SELECT, GPIO_202_TYPE, GPO_202_LEVEL+GPIO_202_STICKY+GPIO_202_PULLUP+GPIO_202_PULLDOWN, GPIO_202_SELECT},
- {GPIO_203_SELECT, GPIO_203_TYPE, GPO_203_LEVEL+GPIO_203_STICKY+GPIO_203_PULLUP+GPIO_203_PULLDOWN, GPIO_203_SELECT},
- {GPIO_204_SELECT, GPIO_204_TYPE, GPO_204_LEVEL+GPIO_204_STICKY+GPIO_204_PULLUP+GPIO_204_PULLDOWN, GPIO_204_SELECT},
- {GPIO_205_SELECT, GPIO_205_TYPE, GPO_205_LEVEL+GPIO_205_STICKY+GPIO_205_PULLUP+GPIO_205_PULLDOWN, GPIO_205_SELECT},
- {GPIO_206_SELECT, GPIO_206_TYPE, GPO_206_LEVEL+GPIO_206_STICKY+GPIO_206_PULLUP+GPIO_206_PULLDOWN, GPIO_206_SELECT},
- {GPIO_207_SELECT, GPIO_207_TYPE, GPO_207_LEVEL+GPIO_207_STICKY+GPIO_207_PULLUP+GPIO_207_PULLDOWN, GPIO_207_SELECT},
- {GPIO_208_SELECT, GPIO_208_TYPE, GPO_208_LEVEL+GPIO_208_STICKY+GPIO_208_PULLUP+GPIO_208_PULLDOWN, GPIO_208_SELECT},
- {GPIO_209_SELECT, GPIO_209_TYPE, GPO_209_LEVEL+GPIO_209_STICKY+GPIO_209_PULLUP+GPIO_209_PULLDOWN, GPIO_209_SELECT},
- {GPIO_210_SELECT, GPIO_210_TYPE, GPO_210_LEVEL+GPIO_210_STICKY+GPIO_210_PULLUP+GPIO_210_PULLDOWN, GPIO_210_SELECT},
- {GPIO_211_SELECT, GPIO_211_TYPE, GPO_211_LEVEL+GPIO_211_STICKY+GPIO_211_PULLUP+GPIO_211_PULLDOWN, GPIO_211_SELECT},
- {GPIO_212_SELECT, GPIO_212_TYPE, GPO_212_LEVEL+GPIO_212_STICKY+GPIO_212_PULLUP+GPIO_212_PULLDOWN, GPIO_212_SELECT},
- {GPIO_213_SELECT, GPIO_213_TYPE, GPO_213_LEVEL+GPIO_213_STICKY+GPIO_213_PULLUP+GPIO_213_PULLDOWN, GPIO_213_SELECT},
- {GPIO_214_SELECT, GPIO_214_TYPE, GPO_214_LEVEL+GPIO_214_STICKY+GPIO_214_PULLUP+GPIO_214_PULLDOWN, GPIO_214_SELECT},
- {GPIO_215_SELECT, GPIO_215_TYPE, GPO_215_LEVEL+GPIO_215_STICKY+GPIO_215_PULLUP+GPIO_215_PULLDOWN, GPIO_215_SELECT},
- {GPIO_216_SELECT, GPIO_216_TYPE, GPO_216_LEVEL+GPIO_216_STICKY+GPIO_216_PULLUP+GPIO_216_PULLDOWN, GPIO_216_SELECT},
- {GPIO_217_SELECT, GPIO_217_TYPE, GPO_217_LEVEL+GPIO_217_STICKY+GPIO_217_PULLUP+GPIO_217_PULLDOWN, GPIO_217_SELECT},
- {GPIO_218_SELECT, GPIO_218_TYPE, GPO_218_LEVEL+GPIO_218_STICKY+GPIO_218_PULLUP+GPIO_218_PULLDOWN, GPIO_218_SELECT},
- {GPIO_219_SELECT, GPIO_219_TYPE, GPO_219_LEVEL+GPIO_219_STICKY+GPIO_219_PULLUP+GPIO_219_PULLDOWN, GPIO_219_SELECT},
- {GPIO_220_SELECT, GPIO_220_TYPE, GPO_220_LEVEL+GPIO_220_STICKY+GPIO_220_PULLUP+GPIO_220_PULLDOWN, GPIO_220_SELECT},
- {GPIO_221_SELECT, GPIO_221_TYPE, GPO_221_LEVEL+GPIO_221_STICKY+GPIO_221_PULLUP+GPIO_221_PULLDOWN, GPIO_221_SELECT},
- {GPIO_222_SELECT, GPIO_222_TYPE, GPO_222_LEVEL+GPIO_222_STICKY+GPIO_222_PULLUP+GPIO_222_PULLDOWN, GPIO_222_SELECT},
- {GPIO_223_SELECT, GPIO_223_TYPE, GPO_223_LEVEL+GPIO_223_STICKY+GPIO_223_PULLUP+GPIO_223_PULLDOWN, GPIO_223_SELECT},
- {GPIO_224_SELECT, GPIO_224_TYPE, GPO_224_LEVEL+GPIO_224_STICKY+GPIO_224_PULLUP+GPIO_224_PULLDOWN, GPIO_224_SELECT},
- {GPIO_225_SELECT, GPIO_225_TYPE, GPO_225_LEVEL+GPIO_225_STICKY+GPIO_225_PULLUP+GPIO_225_PULLDOWN, GPIO_225_SELECT},
- {GPIO_226_SELECT, GPIO_226_TYPE, GPO_226_LEVEL+GPIO_226_STICKY+GPIO_226_PULLUP+GPIO_226_PULLDOWN, GPIO_226_SELECT},
- {GPIO_227_SELECT, GPIO_227_TYPE, GPO_227_LEVEL+GPIO_227_STICKY+GPIO_227_PULLUP+GPIO_227_PULLDOWN, GPIO_227_SELECT},
- {GPIO_228_SELECT, GPIO_228_TYPE, GPO_228_LEVEL+GPIO_228_STICKY+GPIO_228_PULLUP+GPIO_228_PULLDOWN, GPIO_228_SELECT},
- {GPIO_229_SELECT, GPIO_229_TYPE, GPO_229_LEVEL+GPIO_229_STICKY+GPIO_229_PULLUP+GPIO_229_PULLDOWN, GPIO_229_SELECT},
+ {GPIO_00_SELECT, GPIO_00_TYPE, GPO_00_LEVEL+GPIO_00_STICKY+GPIO_00_PULLUP+GPIO_00_PULLDOWN, GPIO_00_SELECT},
+ {GPIO_01_SELECT, GPIO_01_TYPE, GPO_01_LEVEL+GPIO_01_STICKY+GPIO_01_PULLUP+GPIO_01_PULLDOWN, GPIO_01_SELECT},
+ {GPIO_02_SELECT, GPIO_02_TYPE, GPO_02_LEVEL+GPIO_02_STICKY+GPIO_02_PULLUP+GPIO_02_PULLDOWN, GPIO_02_SELECT},
+ {GPIO_03_SELECT, GPIO_03_TYPE, GPO_03_LEVEL+GPIO_03_STICKY+GPIO_03_PULLUP+GPIO_03_PULLDOWN, GPIO_03_SELECT},
+ {GPIO_04_SELECT, GPIO_04_TYPE, GPO_04_LEVEL+GPIO_04_STICKY+GPIO_04_PULLUP+GPIO_04_PULLDOWN, GPIO_04_SELECT},
+ {GPIO_05_SELECT, GPIO_05_TYPE, GPO_05_LEVEL+GPIO_05_STICKY+GPIO_05_PULLUP+GPIO_05_PULLDOWN, GPIO_05_SELECT},
+ {GPIO_06_SELECT, GPIO_06_TYPE, GPO_06_LEVEL+GPIO_06_STICKY+GPIO_06_PULLUP+GPIO_06_PULLDOWN, GPIO_06_SELECT},
+ {GPIO_07_SELECT, GPIO_07_TYPE, GPO_07_LEVEL+GPIO_07_STICKY+GPIO_07_PULLUP+GPIO_07_PULLDOWN, GPIO_07_SELECT},
+ {GPIO_08_SELECT, GPIO_08_TYPE, GPO_08_LEVEL+GPIO_08_STICKY+GPIO_08_PULLUP+GPIO_08_PULLDOWN, GPIO_08_SELECT},
+ {GPIO_09_SELECT, GPIO_09_TYPE, GPO_09_LEVEL+GPIO_09_STICKY+GPIO_09_PULLUP+GPIO_09_PULLDOWN, GPIO_09_SELECT},
+ {GPIO_10_SELECT, GPIO_10_TYPE, GPO_10_LEVEL+GPIO_10_STICKY+GPIO_10_PULLUP+GPIO_10_PULLDOWN, GPIO_10_SELECT},
+ {GPIO_11_SELECT, GPIO_11_TYPE, GPO_11_LEVEL+GPIO_11_STICKY+GPIO_11_PULLUP+GPIO_11_PULLDOWN, GPIO_11_SELECT},
+ {GPIO_12_SELECT, GPIO_12_TYPE, GPO_12_LEVEL+GPIO_12_STICKY+GPIO_12_PULLUP+GPIO_12_PULLDOWN, GPIO_12_SELECT},
+ {GPIO_13_SELECT, GPIO_13_TYPE, GPO_13_LEVEL+GPIO_13_STICKY+GPIO_13_PULLUP+GPIO_13_PULLDOWN, GPIO_13_SELECT},
+ {GPIO_14_SELECT, GPIO_14_TYPE, GPO_14_LEVEL+GPIO_14_STICKY+GPIO_14_PULLUP+GPIO_14_PULLDOWN, GPIO_14_SELECT},
+ {GPIO_15_SELECT, GPIO_15_TYPE, GPO_15_LEVEL+GPIO_15_STICKY+GPIO_15_PULLUP+GPIO_15_PULLDOWN, GPIO_15_SELECT},
+ {GPIO_16_SELECT, GPIO_16_TYPE, GPO_16_LEVEL+GPIO_16_STICKY+GPIO_16_PULLUP+GPIO_16_PULLDOWN, GPIO_16_SELECT},
+ {GPIO_17_SELECT, GPIO_17_TYPE, GPO_17_LEVEL+GPIO_17_STICKY+GPIO_17_PULLUP+GPIO_17_PULLDOWN, GPIO_17_SELECT},
+ {GPIO_18_SELECT, GPIO_18_TYPE, GPO_18_LEVEL+GPIO_18_STICKY+GPIO_18_PULLUP+GPIO_18_PULLDOWN, GPIO_18_SELECT},
+ {GPIO_19_SELECT, GPIO_19_TYPE, GPO_19_LEVEL+GPIO_19_STICKY+GPIO_19_PULLUP+GPIO_19_PULLDOWN, GPIO_19_SELECT},
+ {GPIO_20_SELECT, GPIO_20_TYPE, GPO_20_LEVEL+GPIO_20_STICKY+GPIO_20_PULLUP+GPIO_20_PULLDOWN, GPIO_20_SELECT},
+ {GPIO_21_SELECT, GPIO_21_TYPE, GPO_21_LEVEL+GPIO_21_STICKY+GPIO_21_PULLUP+GPIO_21_PULLDOWN, GPIO_21_SELECT},
+ {GPIO_22_SELECT, GPIO_22_TYPE, GPO_22_LEVEL+GPIO_22_STICKY+GPIO_22_PULLUP+GPIO_22_PULLDOWN, GPIO_22_SELECT},
+ {GPIO_23_SELECT, GPIO_23_TYPE, GPO_23_LEVEL+GPIO_23_STICKY+GPIO_23_PULLUP+GPIO_23_PULLDOWN, GPIO_23_SELECT},
+ {GPIO_24_SELECT, GPIO_24_TYPE, GPO_24_LEVEL+GPIO_24_STICKY+GPIO_24_PULLUP+GPIO_24_PULLDOWN, GPIO_24_SELECT},
+ {GPIO_25_SELECT, GPIO_25_TYPE, GPO_25_LEVEL+GPIO_25_STICKY+GPIO_25_PULLUP+GPIO_25_PULLDOWN, GPIO_25_SELECT},
+ {GPIO_26_SELECT, GPIO_26_TYPE, GPO_26_LEVEL+GPIO_26_STICKY+GPIO_26_PULLUP+GPIO_26_PULLDOWN, GPIO_26_SELECT},
+ {GPIO_27_SELECT, GPIO_27_TYPE, GPO_27_LEVEL+GPIO_27_STICKY+GPIO_27_PULLUP+GPIO_27_PULLDOWN, GPIO_27_SELECT},
+ {GPIO_28_SELECT, GPIO_28_TYPE, GPO_28_LEVEL+GPIO_28_STICKY+GPIO_28_PULLUP+GPIO_28_PULLDOWN, GPIO_28_SELECT},
+ {GPIO_29_SELECT, GPIO_29_TYPE, GPO_29_LEVEL+GPIO_29_STICKY+GPIO_29_PULLUP+GPIO_29_PULLDOWN, GPIO_29_SELECT},
+ {GPIO_30_SELECT, GPIO_30_TYPE, GPO_30_LEVEL+GPIO_30_STICKY+GPIO_30_PULLUP+GPIO_30_PULLDOWN, GPIO_30_SELECT},
+ {GPIO_31_SELECT, GPIO_31_TYPE, GPO_31_LEVEL+GPIO_31_STICKY+GPIO_31_PULLUP+GPIO_31_PULLDOWN, GPIO_31_SELECT},
+ {GPIO_32_SELECT, GPIO_32_TYPE, GPO_32_LEVEL+GPIO_32_STICKY+GPIO_32_PULLUP+GPIO_32_PULLDOWN, GPIO_32_SELECT},
+ {GPIO_33_SELECT, GPIO_33_TYPE, GPO_33_LEVEL+GPIO_33_STICKY+GPIO_33_PULLUP+GPIO_33_PULLDOWN, GPIO_33_SELECT},
+ {GPIO_34_SELECT, GPIO_34_TYPE, GPO_34_LEVEL+GPIO_34_STICKY+GPIO_34_PULLUP+GPIO_34_PULLDOWN, GPIO_34_SELECT},
+ {GPIO_35_SELECT, GPIO_35_TYPE, GPO_35_LEVEL+GPIO_35_STICKY+GPIO_35_PULLUP+GPIO_35_PULLDOWN, GPIO_35_SELECT},
+ {GPIO_36_SELECT, GPIO_36_TYPE, GPO_36_LEVEL+GPIO_36_STICKY+GPIO_36_PULLUP+GPIO_36_PULLDOWN, GPIO_36_SELECT},
+ {GPIO_37_SELECT, GPIO_37_TYPE, GPO_37_LEVEL+GPIO_37_STICKY+GPIO_37_PULLUP+GPIO_37_PULLDOWN, GPIO_37_SELECT},
+ {GPIO_38_SELECT, GPIO_38_TYPE, GPO_38_LEVEL+GPIO_38_STICKY+GPIO_38_PULLUP+GPIO_38_PULLDOWN, GPIO_38_SELECT},
+ {GPIO_39_SELECT, GPIO_39_TYPE, GPO_39_LEVEL+GPIO_39_STICKY+GPIO_39_PULLUP+GPIO_39_PULLDOWN, GPIO_39_SELECT},
+ {GPIO_40_SELECT, GPIO_40_TYPE, GPO_40_LEVEL+GPIO_40_STICKY+GPIO_40_PULLUP+GPIO_40_PULLDOWN, GPIO_40_SELECT},
+ {GPIO_41_SELECT, GPIO_41_TYPE, GPO_41_LEVEL+GPIO_41_STICKY+GPIO_41_PULLUP+GPIO_41_PULLDOWN, GPIO_41_SELECT},
+ {GPIO_42_SELECT, GPIO_42_TYPE, GPO_42_LEVEL+GPIO_42_STICKY+GPIO_42_PULLUP+GPIO_42_PULLDOWN, GPIO_42_SELECT},
+ {GPIO_43_SELECT, GPIO_43_TYPE, GPO_43_LEVEL+GPIO_43_STICKY+GPIO_43_PULLUP+GPIO_43_PULLDOWN, GPIO_43_SELECT},
+ {GPIO_44_SELECT, GPIO_44_TYPE, GPO_44_LEVEL+GPIO_44_STICKY+GPIO_44_PULLUP+GPIO_44_PULLDOWN, GPIO_44_SELECT},
+ {GPIO_45_SELECT, GPIO_45_TYPE, GPO_45_LEVEL+GPIO_45_STICKY+GPIO_45_PULLUP+GPIO_45_PULLDOWN, GPIO_45_SELECT},
+ {GPIO_46_SELECT, GPIO_46_TYPE, GPO_46_LEVEL+GPIO_46_STICKY+GPIO_46_PULLUP+GPIO_46_PULLDOWN, GPIO_46_SELECT},
+ {GPIO_47_SELECT, GPIO_47_TYPE, GPO_47_LEVEL+GPIO_47_STICKY+GPIO_47_PULLUP+GPIO_47_PULLDOWN, GPIO_47_SELECT},
+ {GPIO_48_SELECT, GPIO_48_TYPE, GPO_48_LEVEL+GPIO_48_STICKY+GPIO_48_PULLUP+GPIO_48_PULLDOWN, GPIO_48_SELECT},
+ {GPIO_49_SELECT, GPIO_49_TYPE, GPO_49_LEVEL+GPIO_49_STICKY+GPIO_49_PULLUP+GPIO_49_PULLDOWN, GPIO_49_SELECT},
+ {GPIO_50_SELECT, GPIO_50_TYPE, GPO_50_LEVEL+GPIO_50_STICKY+GPIO_50_PULLUP+GPIO_50_PULLDOWN, GPIO_50_SELECT},
+ {GPIO_51_SELECT, GPIO_51_TYPE, GPO_51_LEVEL+GPIO_51_STICKY+GPIO_51_PULLUP+GPIO_51_PULLDOWN, GPIO_51_SELECT},
+ {GPIO_52_SELECT, GPIO_52_TYPE, GPO_52_LEVEL+GPIO_52_STICKY+GPIO_52_PULLUP+GPIO_52_PULLDOWN, GPIO_52_SELECT},
+ {GPIO_53_SELECT, GPIO_53_TYPE, GPO_53_LEVEL+GPIO_53_STICKY+GPIO_53_PULLUP+GPIO_53_PULLDOWN, GPIO_53_SELECT},
+ {GPIO_54_SELECT, GPIO_54_TYPE, GPO_54_LEVEL+GPIO_54_STICKY+GPIO_54_PULLUP+GPIO_54_PULLDOWN, GPIO_54_SELECT},
+ {GPIO_55_SELECT, GPIO_55_TYPE, GPO_55_LEVEL+GPIO_55_STICKY+GPIO_55_PULLUP+GPIO_55_PULLDOWN, GPIO_55_SELECT},
+ {GPIO_56_SELECT, GPIO_56_TYPE, GPO_56_LEVEL+GPIO_56_STICKY+GPIO_56_PULLUP+GPIO_56_PULLDOWN, GPIO_56_SELECT},
+ {GPIO_57_SELECT, GPIO_57_TYPE, GPO_57_LEVEL+GPIO_57_STICKY+GPIO_57_PULLUP+GPIO_57_PULLDOWN, GPIO_57_SELECT},
+ {GPIO_58_SELECT, GPIO_58_TYPE, GPO_58_LEVEL+GPIO_58_STICKY+GPIO_58_PULLUP+GPIO_58_PULLDOWN, GPIO_58_SELECT},
+ {GPIO_59_SELECT, GPIO_59_TYPE, GPO_59_LEVEL+GPIO_59_STICKY+GPIO_59_PULLUP+GPIO_59_PULLDOWN, GPIO_59_SELECT},
+ {GPIO_60_SELECT, GPIO_60_TYPE, GPO_60_LEVEL+GPIO_60_STICKY+GPIO_60_PULLUP+GPIO_60_PULLDOWN, GPIO_60_SELECT},
+ {GPIO_61_SELECT, GPIO_61_TYPE, GPO_61_LEVEL+GPIO_61_STICKY+GPIO_61_PULLUP+GPIO_61_PULLDOWN, GPIO_61_SELECT},
+ {GPIO_62_SELECT, GPIO_62_TYPE, GPO_62_LEVEL+GPIO_62_STICKY+GPIO_62_PULLUP+GPIO_62_PULLDOWN, GPIO_62_SELECT},
+ {GPIO_63_SELECT, GPIO_63_TYPE, GPO_63_LEVEL+GPIO_63_STICKY+GPIO_63_PULLUP+GPIO_63_PULLDOWN, GPIO_63_SELECT},
+ {GPIO_64_SELECT, GPIO_64_TYPE, GPO_64_LEVEL+GPIO_64_STICKY+GPIO_64_PULLUP+GPIO_64_PULLDOWN, GPIO_64_SELECT},
+ {GPIO_65_SELECT, GPIO_65_TYPE, GPO_65_LEVEL+GPIO_65_STICKY+GPIO_65_PULLUP+GPIO_65_PULLDOWN, GPIO_65_SELECT},
+ {GPIO_66_SELECT, GPIO_66_TYPE, GPO_66_LEVEL+GPIO_66_STICKY+GPIO_66_PULLUP+GPIO_66_PULLDOWN, GPIO_66_SELECT},
+ {GPIO_67_SELECT, GPIO_67_TYPE, GPO_67_LEVEL+GPIO_67_STICKY+GPIO_67_PULLUP+GPIO_67_PULLDOWN, GPIO_67_SELECT},
+ {GPIO_68_SELECT, GPIO_68_TYPE, GPO_68_LEVEL+GPIO_68_STICKY+GPIO_68_PULLUP+GPIO_68_PULLDOWN, GPIO_68_SELECT},
+ {GPIO_69_SELECT, GPIO_69_TYPE, GPO_69_LEVEL+GPIO_69_STICKY+GPIO_69_PULLUP+GPIO_69_PULLDOWN, GPIO_69_SELECT},
+ {GPIO_70_SELECT, GPIO_70_TYPE, GPO_70_LEVEL+GPIO_70_STICKY+GPIO_70_PULLUP+GPIO_70_PULLDOWN, GPIO_70_SELECT},
+ {GPIO_71_SELECT, GPIO_71_TYPE, GPO_71_LEVEL+GPIO_71_STICKY+GPIO_71_PULLUP+GPIO_71_PULLDOWN, GPIO_71_SELECT},
+ {GPIO_72_SELECT, GPIO_72_TYPE, GPO_72_LEVEL+GPIO_72_STICKY+GPIO_72_PULLUP+GPIO_72_PULLDOWN, GPIO_72_SELECT},
+ {GPIO_73_SELECT, GPIO_73_TYPE, GPO_73_LEVEL+GPIO_73_STICKY+GPIO_73_PULLUP+GPIO_73_PULLDOWN, GPIO_73_SELECT},
+ {GPIO_74_SELECT, GPIO_74_TYPE, GPO_74_LEVEL+GPIO_74_STICKY+GPIO_74_PULLUP+GPIO_74_PULLDOWN, GPIO_74_SELECT},
+ {GPIO_75_SELECT, GPIO_75_TYPE, GPO_75_LEVEL+GPIO_75_STICKY+GPIO_75_PULLUP+GPIO_75_PULLDOWN, GPIO_75_SELECT},
+ {GPIO_76_SELECT, GPIO_76_TYPE, GPO_76_LEVEL+GPIO_76_STICKY+GPIO_76_PULLUP+GPIO_76_PULLDOWN, GPIO_76_SELECT},
+ {GPIO_77_SELECT, GPIO_77_TYPE, GPO_77_LEVEL+GPIO_77_STICKY+GPIO_77_PULLUP+GPIO_77_PULLDOWN, GPIO_77_SELECT},
+ {GPIO_78_SELECT, GPIO_78_TYPE, GPO_78_LEVEL+GPIO_78_STICKY+GPIO_78_PULLUP+GPIO_78_PULLDOWN, GPIO_78_SELECT},
+ {GPIO_79_SELECT, GPIO_79_TYPE, GPO_79_LEVEL+GPIO_79_STICKY+GPIO_79_PULLUP+GPIO_79_PULLDOWN, GPIO_79_SELECT},
+ {GPIO_80_SELECT, GPIO_80_TYPE, GPO_80_LEVEL+GPIO_80_STICKY+GPIO_80_PULLUP+GPIO_80_PULLDOWN, GPIO_80_SELECT},
+ {GPIO_81_SELECT, GPIO_81_TYPE, GPO_81_LEVEL+GPIO_81_STICKY+GPIO_81_PULLUP+GPIO_81_PULLDOWN, GPIO_81_SELECT},
+ {GPIO_82_SELECT, GPIO_82_TYPE, GPO_82_LEVEL+GPIO_82_STICKY+GPIO_82_PULLUP+GPIO_82_PULLDOWN, GPIO_82_SELECT},
+ {GPIO_83_SELECT, GPIO_83_TYPE, GPO_83_LEVEL+GPIO_83_STICKY+GPIO_83_PULLUP+GPIO_83_PULLDOWN, GPIO_83_SELECT},
+ {GPIO_84_SELECT, GPIO_84_TYPE, GPO_84_LEVEL+GPIO_84_STICKY+GPIO_84_PULLUP+GPIO_84_PULLDOWN, GPIO_84_SELECT},
+ {GPIO_85_SELECT, GPIO_85_TYPE, GPO_85_LEVEL+GPIO_85_STICKY+GPIO_85_PULLUP+GPIO_85_PULLDOWN, GPIO_85_SELECT},
+ {GPIO_86_SELECT, GPIO_86_TYPE, GPO_86_LEVEL+GPIO_86_STICKY+GPIO_86_PULLUP+GPIO_86_PULLDOWN, GPIO_86_SELECT},
+ {GPIO_87_SELECT, GPIO_87_TYPE, GPO_87_LEVEL+GPIO_87_STICKY+GPIO_87_PULLUP+GPIO_87_PULLDOWN, GPIO_87_SELECT},
+ {GPIO_88_SELECT, GPIO_88_TYPE, GPO_88_LEVEL+GPIO_88_STICKY+GPIO_88_PULLUP+GPIO_88_PULLDOWN, GPIO_88_SELECT},
+ {GPIO_89_SELECT, GPIO_89_TYPE, GPO_89_LEVEL+GPIO_89_STICKY+GPIO_89_PULLUP+GPIO_89_PULLDOWN, GPIO_89_SELECT},
+ {GPIO_90_SELECT, GPIO_90_TYPE, GPO_90_LEVEL+GPIO_90_STICKY+GPIO_90_PULLUP+GPIO_90_PULLDOWN, GPIO_90_SELECT},
+ {GPIO_91_SELECT, GPIO_91_TYPE, GPO_91_LEVEL+GPIO_91_STICKY+GPIO_91_PULLUP+GPIO_91_PULLDOWN, GPIO_91_SELECT},
+ {GPIO_92_SELECT, GPIO_92_TYPE, GPO_92_LEVEL+GPIO_92_STICKY+GPIO_92_PULLUP+GPIO_92_PULLDOWN, GPIO_92_SELECT},
+ {GPIO_93_SELECT, GPIO_93_TYPE, GPO_93_LEVEL+GPIO_93_STICKY+GPIO_93_PULLUP+GPIO_93_PULLDOWN, GPIO_93_SELECT},
+ {GPIO_94_SELECT, GPIO_94_TYPE, GPO_94_LEVEL+GPIO_94_STICKY+GPIO_94_PULLUP+GPIO_94_PULLDOWN, GPIO_94_SELECT},
+ {GPIO_95_SELECT, GPIO_95_TYPE, GPO_95_LEVEL+GPIO_95_STICKY+GPIO_95_PULLUP+GPIO_95_PULLDOWN, GPIO_95_SELECT},
+ {GPIO_96_SELECT, GPIO_96_TYPE, GPO_96_LEVEL+GPIO_96_STICKY+GPIO_96_PULLUP+GPIO_96_PULLDOWN, GPIO_96_SELECT},
+ {GPIO_97_SELECT, GPIO_97_TYPE, GPO_97_LEVEL+GPIO_97_STICKY+GPIO_97_PULLUP+GPIO_97_PULLDOWN, GPIO_97_SELECT},
+ {GPIO_98_SELECT, GPIO_98_TYPE, GPO_98_LEVEL+GPIO_98_STICKY+GPIO_98_PULLUP+GPIO_98_PULLDOWN, GPIO_98_SELECT},
+ {GPIO_99_SELECT, GPIO_99_TYPE, GPO_99_LEVEL+GPIO_99_STICKY+GPIO_99_PULLUP+GPIO_99_PULLDOWN, GPIO_99_SELECT},
+ {GPIO_100_SELECT, GPIO_100_TYPE, GPO_100_LEVEL+GPIO_100_STICKY+GPIO_100_PULLUP+GPIO_100_PULLDOWN, GPIO_100_SELECT},
+ {GPIO_101_SELECT, GPIO_101_TYPE, GPO_101_LEVEL+GPIO_101_STICKY+GPIO_101_PULLUP+GPIO_101_PULLDOWN, GPIO_101_SELECT},
+ {GPIO_102_SELECT, GPIO_102_TYPE, GPO_102_LEVEL+GPIO_102_STICKY+GPIO_102_PULLUP+GPIO_102_PULLDOWN, GPIO_102_SELECT},
+ {GPIO_103_SELECT, GPIO_103_TYPE, GPO_103_LEVEL+GPIO_103_STICKY+GPIO_103_PULLUP+GPIO_103_PULLDOWN, GPIO_103_SELECT},
+ {GPIO_104_SELECT, GPIO_104_TYPE, GPO_104_LEVEL+GPIO_104_STICKY+GPIO_104_PULLUP+GPIO_104_PULLDOWN, GPIO_104_SELECT},
+ {GPIO_105_SELECT, GPIO_105_TYPE, GPO_105_LEVEL+GPIO_105_STICKY+GPIO_105_PULLUP+GPIO_105_PULLDOWN, GPIO_105_SELECT},
+ {GPIO_106_SELECT, GPIO_106_TYPE, GPO_106_LEVEL+GPIO_106_STICKY+GPIO_106_PULLUP+GPIO_106_PULLDOWN, GPIO_106_SELECT},
+ {GPIO_107_SELECT, GPIO_107_TYPE, GPO_107_LEVEL+GPIO_107_STICKY+GPIO_107_PULLUP+GPIO_107_PULLDOWN, GPIO_107_SELECT},
+ {GPIO_108_SELECT, GPIO_108_TYPE, GPO_108_LEVEL+GPIO_108_STICKY+GPIO_108_PULLUP+GPIO_108_PULLDOWN, GPIO_108_SELECT},
+ {GPIO_109_SELECT, GPIO_109_TYPE, GPO_109_LEVEL+GPIO_109_STICKY+GPIO_109_PULLUP+GPIO_109_PULLDOWN, GPIO_109_SELECT},
+ {GPIO_110_SELECT, GPIO_110_TYPE, GPO_110_LEVEL+GPIO_110_STICKY+GPIO_110_PULLUP+GPIO_110_PULLDOWN, GPIO_110_SELECT},
+ {GPIO_111_SELECT, GPIO_111_TYPE, GPO_111_LEVEL+GPIO_111_STICKY+GPIO_111_PULLUP+GPIO_111_PULLDOWN, GPIO_111_SELECT},
+ {GPIO_112_SELECT, GPIO_112_TYPE, GPO_112_LEVEL+GPIO_112_STICKY+GPIO_112_PULLUP+GPIO_112_PULLDOWN, GPIO_112_SELECT},
+ {GPIO_113_SELECT, GPIO_113_TYPE, GPO_113_LEVEL+GPIO_113_STICKY+GPIO_113_PULLUP+GPIO_113_PULLDOWN, GPIO_113_SELECT},
+ {GPIO_114_SELECT, GPIO_114_TYPE, GPO_114_LEVEL+GPIO_114_STICKY+GPIO_114_PULLUP+GPIO_114_PULLDOWN, GPIO_114_SELECT},
+ {GPIO_115_SELECT, GPIO_115_TYPE, GPO_115_LEVEL+GPIO_115_STICKY+GPIO_115_PULLUP+GPIO_115_PULLDOWN, GPIO_115_SELECT},
+ {GPIO_116_SELECT, GPIO_116_TYPE, GPO_116_LEVEL+GPIO_116_STICKY+GPIO_116_PULLUP+GPIO_116_PULLDOWN, GPIO_116_SELECT},
+ {GPIO_117_SELECT, GPIO_117_TYPE, GPO_117_LEVEL+GPIO_117_STICKY+GPIO_117_PULLUP+GPIO_117_PULLDOWN, GPIO_117_SELECT},
+ {GPIO_118_SELECT, GPIO_118_TYPE, GPO_118_LEVEL+GPIO_118_STICKY+GPIO_118_PULLUP+GPIO_118_PULLDOWN, GPIO_118_SELECT},
+ {GPIO_119_SELECT, GPIO_119_TYPE, GPO_119_LEVEL+GPIO_119_STICKY+GPIO_119_PULLUP+GPIO_119_PULLDOWN, GPIO_119_SELECT},
+ {GPIO_120_SELECT, GPIO_120_TYPE, GPO_120_LEVEL+GPIO_120_STICKY+GPIO_120_PULLUP+GPIO_120_PULLDOWN, GPIO_120_SELECT},
+ {GPIO_121_SELECT, GPIO_121_TYPE, GPO_121_LEVEL+GPIO_121_STICKY+GPIO_121_PULLUP+GPIO_121_PULLDOWN, GPIO_121_SELECT},
+ {GPIO_122_SELECT, GPIO_122_TYPE, GPO_122_LEVEL+GPIO_122_STICKY+GPIO_122_PULLUP+GPIO_122_PULLDOWN, GPIO_122_SELECT},
+ {GPIO_123_SELECT, GPIO_123_TYPE, GPO_123_LEVEL+GPIO_123_STICKY+GPIO_123_PULLUP+GPIO_123_PULLDOWN, GPIO_123_SELECT},
+ {GPIO_124_SELECT, GPIO_124_TYPE, GPO_124_LEVEL+GPIO_124_STICKY+GPIO_124_PULLUP+GPIO_124_PULLDOWN, GPIO_124_SELECT},
+ {GPIO_125_SELECT, GPIO_125_TYPE, GPO_125_LEVEL+GPIO_125_STICKY+GPIO_125_PULLUP+GPIO_125_PULLDOWN, GPIO_125_SELECT},
+ {GPIO_126_SELECT, GPIO_126_TYPE, GPO_126_LEVEL+GPIO_126_STICKY+GPIO_126_PULLUP+GPIO_126_PULLDOWN, GPIO_126_SELECT},
+ {GPIO_127_SELECT, GPIO_127_TYPE, GPO_127_LEVEL+GPIO_127_STICKY+GPIO_127_PULLUP+GPIO_127_PULLDOWN, GPIO_127_SELECT},
+ {GPIO_128_SELECT, GPIO_128_TYPE, GPO_128_LEVEL+GPIO_128_STICKY+GPIO_128_PULLUP+GPIO_128_PULLDOWN, GPIO_128_SELECT},
+ {GPIO_129_SELECT, GPIO_129_TYPE, GPO_129_LEVEL+GPIO_129_STICKY+GPIO_129_PULLUP+GPIO_129_PULLDOWN, GPIO_129_SELECT},
+ {GPIO_130_SELECT, GPIO_130_TYPE, GPO_130_LEVEL+GPIO_130_STICKY+GPIO_130_PULLUP+GPIO_130_PULLDOWN, GPIO_130_SELECT},
+ {GPIO_131_SELECT, GPIO_131_TYPE, GPO_131_LEVEL+GPIO_131_STICKY+GPIO_131_PULLUP+GPIO_131_PULLDOWN, GPIO_131_SELECT},
+ {GPIO_132_SELECT, GPIO_132_TYPE, GPO_132_LEVEL+GPIO_132_STICKY+GPIO_132_PULLUP+GPIO_132_PULLDOWN, GPIO_132_SELECT},
+ {GPIO_133_SELECT, GPIO_133_TYPE, GPO_133_LEVEL+GPIO_133_STICKY+GPIO_133_PULLUP+GPIO_133_PULLDOWN, GPIO_133_SELECT},
+ {GPIO_134_SELECT, GPIO_134_TYPE, GPO_134_LEVEL+GPIO_134_STICKY+GPIO_134_PULLUP+GPIO_134_PULLDOWN, GPIO_134_SELECT},
+ {GPIO_135_SELECT, GPIO_135_TYPE, GPO_135_LEVEL+GPIO_135_STICKY+GPIO_135_PULLUP+GPIO_135_PULLDOWN, GPIO_135_SELECT},
+ {GPIO_136_SELECT, GPIO_136_TYPE, GPO_136_LEVEL+GPIO_136_STICKY+GPIO_136_PULLUP+GPIO_136_PULLDOWN, GPIO_136_SELECT},
+ {GPIO_137_SELECT, GPIO_137_TYPE, GPO_137_LEVEL+GPIO_137_STICKY+GPIO_137_PULLUP+GPIO_137_PULLDOWN, GPIO_137_SELECT},
+ {GPIO_138_SELECT, GPIO_138_TYPE, GPO_138_LEVEL+GPIO_138_STICKY+GPIO_138_PULLUP+GPIO_138_PULLDOWN, GPIO_138_SELECT},
+ {GPIO_139_SELECT, GPIO_139_TYPE, GPO_139_LEVEL+GPIO_139_STICKY+GPIO_139_PULLUP+GPIO_139_PULLDOWN, GPIO_139_SELECT},
+ {GPIO_140_SELECT, GPIO_140_TYPE, GPO_140_LEVEL+GPIO_140_STICKY+GPIO_140_PULLUP+GPIO_140_PULLDOWN, GPIO_140_SELECT},
+ {GPIO_141_SELECT, GPIO_141_TYPE, GPO_141_LEVEL+GPIO_141_STICKY+GPIO_141_PULLUP+GPIO_141_PULLDOWN, GPIO_141_SELECT},
+ {GPIO_142_SELECT, GPIO_142_TYPE, GPO_142_LEVEL+GPIO_142_STICKY+GPIO_142_PULLUP+GPIO_142_PULLDOWN, GPIO_142_SELECT},
+ {GPIO_143_SELECT, GPIO_143_TYPE, GPO_143_LEVEL+GPIO_143_STICKY+GPIO_143_PULLUP+GPIO_143_PULLDOWN, GPIO_143_SELECT},
+ {GPIO_144_SELECT, GPIO_144_TYPE, GPO_144_LEVEL+GPIO_144_STICKY+GPIO_144_PULLUP+GPIO_144_PULLDOWN, GPIO_144_SELECT},
+ {GPIO_145_SELECT, GPIO_145_TYPE, GPO_145_LEVEL+GPIO_145_STICKY+GPIO_145_PULLUP+GPIO_145_PULLDOWN, GPIO_145_SELECT},
+ {GPIO_146_SELECT, GPIO_146_TYPE, GPO_146_LEVEL+GPIO_146_STICKY+GPIO_146_PULLUP+GPIO_146_PULLDOWN, GPIO_146_SELECT},
+ {GPIO_147_SELECT, GPIO_147_TYPE, GPO_147_LEVEL+GPIO_147_STICKY+GPIO_147_PULLUP+GPIO_147_PULLDOWN, GPIO_147_SELECT},
+ {GPIO_148_SELECT, GPIO_148_TYPE, GPO_148_LEVEL+GPIO_148_STICKY+GPIO_148_PULLUP+GPIO_148_PULLDOWN, GPIO_148_SELECT},
+ {GPIO_149_SELECT, GPIO_149_TYPE, GPO_149_LEVEL+GPIO_149_STICKY+GPIO_149_PULLUP+GPIO_149_PULLDOWN, GPIO_149_SELECT},
+ {GPIO_150_SELECT, GPIO_150_TYPE, GPO_150_LEVEL+GPIO_150_STICKY+GPIO_150_PULLUP+GPIO_150_PULLDOWN, GPIO_150_SELECT},
+ {GPIO_151_SELECT, GPIO_151_TYPE, GPO_151_LEVEL+GPIO_151_STICKY+GPIO_151_PULLUP+GPIO_151_PULLDOWN, GPIO_151_SELECT},
+ {GPIO_152_SELECT, GPIO_152_TYPE, GPO_152_LEVEL+GPIO_152_STICKY+GPIO_152_PULLUP+GPIO_152_PULLDOWN, GPIO_152_SELECT},
+ {GPIO_153_SELECT, GPIO_153_TYPE, GPO_153_LEVEL+GPIO_153_STICKY+GPIO_153_PULLUP+GPIO_153_PULLDOWN, GPIO_153_SELECT},
+ {GPIO_154_SELECT, GPIO_154_TYPE, GPO_154_LEVEL+GPIO_154_STICKY+GPIO_154_PULLUP+GPIO_154_PULLDOWN, GPIO_154_SELECT},
+ {GPIO_155_SELECT, GPIO_155_TYPE, GPO_155_LEVEL+GPIO_155_STICKY+GPIO_155_PULLUP+GPIO_155_PULLDOWN, GPIO_155_SELECT},
+ {GPIO_156_SELECT, GPIO_156_TYPE, GPO_156_LEVEL+GPIO_156_STICKY+GPIO_156_PULLUP+GPIO_156_PULLDOWN, GPIO_156_SELECT},
+ {GPIO_157_SELECT, GPIO_157_TYPE, GPO_157_LEVEL+GPIO_157_STICKY+GPIO_157_PULLUP+GPIO_157_PULLDOWN, GPIO_157_SELECT},
+ {GPIO_158_SELECT, GPIO_158_TYPE, GPO_158_LEVEL+GPIO_158_STICKY+GPIO_158_PULLUP+GPIO_158_PULLDOWN, GPIO_158_SELECT},
+ {GPIO_159_SELECT, GPIO_159_TYPE, GPO_159_LEVEL+GPIO_159_STICKY+GPIO_159_PULLUP+GPIO_159_PULLDOWN, GPIO_159_SELECT},
+ {GPIO_160_SELECT, GPIO_160_TYPE, GPO_160_LEVEL+GPIO_160_STICKY+GPIO_160_PULLUP+GPIO_160_PULLDOWN, GPIO_160_SELECT},
+ {GPIO_161_SELECT, GPIO_161_TYPE, GPO_161_LEVEL+GPIO_161_STICKY+GPIO_161_PULLUP+GPIO_161_PULLDOWN, GPIO_161_SELECT},
+ {GPIO_162_SELECT, GPIO_162_TYPE, GPO_162_LEVEL+GPIO_162_STICKY+GPIO_162_PULLUP+GPIO_162_PULLDOWN, GPIO_162_SELECT},
+ {GPIO_163_SELECT, GPIO_163_TYPE, GPO_163_LEVEL+GPIO_163_STICKY+GPIO_163_PULLUP+GPIO_163_PULLDOWN, GPIO_163_SELECT},
+ {GPIO_164_SELECT, GPIO_164_TYPE, GPO_164_LEVEL+GPIO_164_STICKY+GPIO_164_PULLUP+GPIO_164_PULLDOWN, GPIO_164_SELECT},
+ {GPIO_165_SELECT, GPIO_165_TYPE, GPO_165_LEVEL+GPIO_165_STICKY+GPIO_165_PULLUP+GPIO_165_PULLDOWN, GPIO_165_SELECT},
+ {GPIO_166_SELECT, GPIO_166_TYPE, GPO_166_LEVEL+GPIO_166_STICKY+GPIO_166_PULLUP+GPIO_166_PULLDOWN, GPIO_166_SELECT},
+ {GPIO_167_SELECT, GPIO_167_TYPE, GPO_167_LEVEL+GPIO_167_STICKY+GPIO_167_PULLUP+GPIO_167_PULLDOWN, GPIO_167_SELECT},
+ {GPIO_168_SELECT, GPIO_168_TYPE, GPO_168_LEVEL+GPIO_168_STICKY+GPIO_168_PULLUP+GPIO_168_PULLDOWN, GPIO_168_SELECT},
+ {GPIO_169_SELECT, GPIO_169_TYPE, GPO_169_LEVEL+GPIO_169_STICKY+GPIO_169_PULLUP+GPIO_169_PULLDOWN, GPIO_169_SELECT},
+ {GPIO_170_SELECT, GPIO_170_TYPE, GPO_170_LEVEL+GPIO_170_STICKY+GPIO_170_PULLUP+GPIO_170_PULLDOWN, GPIO_170_SELECT},
+ {GPIO_171_SELECT, GPIO_171_TYPE, GPO_171_LEVEL+GPIO_171_STICKY+GPIO_171_PULLUP+GPIO_171_PULLDOWN, GPIO_171_SELECT},
+ {GPIO_172_SELECT, GPIO_172_TYPE, GPO_172_LEVEL+GPIO_172_STICKY+GPIO_172_PULLUP+GPIO_172_PULLDOWN, GPIO_172_SELECT},
+ {GPIO_173_SELECT, GPIO_173_TYPE, GPO_173_LEVEL+GPIO_173_STICKY+GPIO_173_PULLUP+GPIO_173_PULLDOWN, GPIO_173_SELECT},
+ {GPIO_174_SELECT, GPIO_174_TYPE, GPO_174_LEVEL+GPIO_174_STICKY+GPIO_174_PULLUP+GPIO_174_PULLDOWN, GPIO_174_SELECT},
+ {GPIO_175_SELECT, GPIO_175_TYPE, GPO_175_LEVEL+GPIO_175_STICKY+GPIO_175_PULLUP+GPIO_175_PULLDOWN, GPIO_175_SELECT},
+ {GPIO_176_SELECT, GPIO_176_TYPE, GPO_176_LEVEL+GPIO_176_STICKY+GPIO_176_PULLUP+GPIO_176_PULLDOWN, GPIO_176_SELECT},
+ {GPIO_177_SELECT, GPIO_177_TYPE, GPO_177_LEVEL+GPIO_177_STICKY+GPIO_177_PULLUP+GPIO_177_PULLDOWN, GPIO_177_SELECT},
+ {GPIO_178_SELECT, GPIO_178_TYPE, GPO_178_LEVEL+GPIO_178_STICKY+GPIO_178_PULLUP+GPIO_178_PULLDOWN, GPIO_178_SELECT},
+ {GPIO_179_SELECT, GPIO_179_TYPE, GPO_179_LEVEL+GPIO_179_STICKY+GPIO_179_PULLUP+GPIO_179_PULLDOWN, GPIO_179_SELECT},
+ {GPIO_180_SELECT, GPIO_180_TYPE, GPO_180_LEVEL+GPIO_180_STICKY+GPIO_180_PULLUP+GPIO_180_PULLDOWN, GPIO_180_SELECT},
+ {GPIO_181_SELECT, GPIO_181_TYPE, GPO_181_LEVEL+GPIO_181_STICKY+GPIO_181_PULLUP+GPIO_181_PULLDOWN, GPIO_181_SELECT},
+ {GPIO_182_SELECT, GPIO_182_TYPE, GPO_182_LEVEL+GPIO_182_STICKY+GPIO_182_PULLUP+GPIO_182_PULLDOWN, GPIO_182_SELECT},
+ {GPIO_183_SELECT, GPIO_183_TYPE, GPO_183_LEVEL+GPIO_183_STICKY+GPIO_183_PULLUP+GPIO_183_PULLDOWN, GPIO_183_SELECT},
+ {GPIO_184_SELECT, GPIO_184_TYPE, GPO_184_LEVEL+GPIO_184_STICKY+GPIO_184_PULLUP+GPIO_184_PULLDOWN, GPIO_184_SELECT},
+ {GPIO_185_SELECT, GPIO_185_TYPE, GPO_185_LEVEL+GPIO_185_STICKY+GPIO_185_PULLUP+GPIO_185_PULLDOWN, GPIO_185_SELECT},
+ {GPIO_186_SELECT, GPIO_186_TYPE, GPO_186_LEVEL+GPIO_186_STICKY+GPIO_186_PULLUP+GPIO_186_PULLDOWN, GPIO_186_SELECT},
+ {GPIO_187_SELECT, GPIO_187_TYPE, GPO_187_LEVEL+GPIO_187_STICKY+GPIO_187_PULLUP+GPIO_187_PULLDOWN, GPIO_187_SELECT},
+ {GPIO_188_SELECT, GPIO_188_TYPE, GPO_188_LEVEL+GPIO_188_STICKY+GPIO_188_PULLUP+GPIO_188_PULLDOWN, GPIO_188_SELECT},
+ {GPIO_189_SELECT, GPIO_189_TYPE, GPO_189_LEVEL+GPIO_189_STICKY+GPIO_189_PULLUP+GPIO_189_PULLDOWN, GPIO_189_SELECT},
+ {GPIO_190_SELECT, GPIO_190_TYPE, GPO_190_LEVEL+GPIO_190_STICKY+GPIO_190_PULLUP+GPIO_190_PULLDOWN, GPIO_190_SELECT},
+ {GPIO_191_SELECT, GPIO_191_TYPE, GPO_191_LEVEL+GPIO_191_STICKY+GPIO_191_PULLUP+GPIO_191_PULLDOWN, GPIO_191_SELECT},
+ {GPIO_192_SELECT, GPIO_192_TYPE, GPO_192_LEVEL+GPIO_192_STICKY+GPIO_192_PULLUP+GPIO_192_PULLDOWN, GPIO_192_SELECT},
+ {GPIO_193_SELECT, GPIO_193_TYPE, GPO_193_LEVEL+GPIO_193_STICKY+GPIO_193_PULLUP+GPIO_193_PULLDOWN, GPIO_193_SELECT},
+ {GPIO_194_SELECT, GPIO_194_TYPE, GPO_194_LEVEL+GPIO_194_STICKY+GPIO_194_PULLUP+GPIO_194_PULLDOWN, GPIO_194_SELECT},
+ {GPIO_195_SELECT, GPIO_195_TYPE, GPO_195_LEVEL+GPIO_195_STICKY+GPIO_195_PULLUP+GPIO_195_PULLDOWN, GPIO_195_SELECT},
+ {GPIO_196_SELECT, GPIO_196_TYPE, GPO_196_LEVEL+GPIO_196_STICKY+GPIO_196_PULLUP+GPIO_196_PULLDOWN, GPIO_196_SELECT},
+ {GPIO_197_SELECT, GPIO_197_TYPE, GPO_197_LEVEL+GPIO_197_STICKY+GPIO_197_PULLUP+GPIO_197_PULLDOWN, GPIO_197_SELECT},
+ {GPIO_198_SELECT, GPIO_198_TYPE, GPO_198_LEVEL+GPIO_198_STICKY+GPIO_198_PULLUP+GPIO_198_PULLDOWN, GPIO_198_SELECT},
+ {GPIO_199_SELECT, GPIO_199_TYPE, GPO_199_LEVEL+GPIO_199_STICKY+GPIO_199_PULLUP+GPIO_199_PULLDOWN, GPIO_199_SELECT},
+ {GPIO_200_SELECT, GPIO_200_TYPE, GPO_200_LEVEL+GPIO_200_STICKY+GPIO_200_PULLUP+GPIO_200_PULLDOWN, GPIO_200_SELECT},
+ {GPIO_201_SELECT, GPIO_201_TYPE, GPO_201_LEVEL+GPIO_201_STICKY+GPIO_201_PULLUP+GPIO_201_PULLDOWN, GPIO_201_SELECT},
+ {GPIO_202_SELECT, GPIO_202_TYPE, GPO_202_LEVEL+GPIO_202_STICKY+GPIO_202_PULLUP+GPIO_202_PULLDOWN, GPIO_202_SELECT},
+ {GPIO_203_SELECT, GPIO_203_TYPE, GPO_203_LEVEL+GPIO_203_STICKY+GPIO_203_PULLUP+GPIO_203_PULLDOWN, GPIO_203_SELECT},
+ {GPIO_204_SELECT, GPIO_204_TYPE, GPO_204_LEVEL+GPIO_204_STICKY+GPIO_204_PULLUP+GPIO_204_PULLDOWN, GPIO_204_SELECT},
+ {GPIO_205_SELECT, GPIO_205_TYPE, GPO_205_LEVEL+GPIO_205_STICKY+GPIO_205_PULLUP+GPIO_205_PULLDOWN, GPIO_205_SELECT},
+ {GPIO_206_SELECT, GPIO_206_TYPE, GPO_206_LEVEL+GPIO_206_STICKY+GPIO_206_PULLUP+GPIO_206_PULLDOWN, GPIO_206_SELECT},
+ {GPIO_207_SELECT, GPIO_207_TYPE, GPO_207_LEVEL+GPIO_207_STICKY+GPIO_207_PULLUP+GPIO_207_PULLDOWN, GPIO_207_SELECT},
+ {GPIO_208_SELECT, GPIO_208_TYPE, GPO_208_LEVEL+GPIO_208_STICKY+GPIO_208_PULLUP+GPIO_208_PULLDOWN, GPIO_208_SELECT},
+ {GPIO_209_SELECT, GPIO_209_TYPE, GPO_209_LEVEL+GPIO_209_STICKY+GPIO_209_PULLUP+GPIO_209_PULLDOWN, GPIO_209_SELECT},
+ {GPIO_210_SELECT, GPIO_210_TYPE, GPO_210_LEVEL+GPIO_210_STICKY+GPIO_210_PULLUP+GPIO_210_PULLDOWN, GPIO_210_SELECT},
+ {GPIO_211_SELECT, GPIO_211_TYPE, GPO_211_LEVEL+GPIO_211_STICKY+GPIO_211_PULLUP+GPIO_211_PULLDOWN, GPIO_211_SELECT},
+ {GPIO_212_SELECT, GPIO_212_TYPE, GPO_212_LEVEL+GPIO_212_STICKY+GPIO_212_PULLUP+GPIO_212_PULLDOWN, GPIO_212_SELECT},
+ {GPIO_213_SELECT, GPIO_213_TYPE, GPO_213_LEVEL+GPIO_213_STICKY+GPIO_213_PULLUP+GPIO_213_PULLDOWN, GPIO_213_SELECT},
+ {GPIO_214_SELECT, GPIO_214_TYPE, GPO_214_LEVEL+GPIO_214_STICKY+GPIO_214_PULLUP+GPIO_214_PULLDOWN, GPIO_214_SELECT},
+ {GPIO_215_SELECT, GPIO_215_TYPE, GPO_215_LEVEL+GPIO_215_STICKY+GPIO_215_PULLUP+GPIO_215_PULLDOWN, GPIO_215_SELECT},
+ {GPIO_216_SELECT, GPIO_216_TYPE, GPO_216_LEVEL+GPIO_216_STICKY+GPIO_216_PULLUP+GPIO_216_PULLDOWN, GPIO_216_SELECT},
+ {GPIO_217_SELECT, GPIO_217_TYPE, GPO_217_LEVEL+GPIO_217_STICKY+GPIO_217_PULLUP+GPIO_217_PULLDOWN, GPIO_217_SELECT},
+ {GPIO_218_SELECT, GPIO_218_TYPE, GPO_218_LEVEL+GPIO_218_STICKY+GPIO_218_PULLUP+GPIO_218_PULLDOWN, GPIO_218_SELECT},
+ {GPIO_219_SELECT, GPIO_219_TYPE, GPO_219_LEVEL+GPIO_219_STICKY+GPIO_219_PULLUP+GPIO_219_PULLDOWN, GPIO_219_SELECT},
+ {GPIO_220_SELECT, GPIO_220_TYPE, GPO_220_LEVEL+GPIO_220_STICKY+GPIO_220_PULLUP+GPIO_220_PULLDOWN, GPIO_220_SELECT},
+ {GPIO_221_SELECT, GPIO_221_TYPE, GPO_221_LEVEL+GPIO_221_STICKY+GPIO_221_PULLUP+GPIO_221_PULLDOWN, GPIO_221_SELECT},
+ {GPIO_222_SELECT, GPIO_222_TYPE, GPO_222_LEVEL+GPIO_222_STICKY+GPIO_222_PULLUP+GPIO_222_PULLDOWN, GPIO_222_SELECT},
+ {GPIO_223_SELECT, GPIO_223_TYPE, GPO_223_LEVEL+GPIO_223_STICKY+GPIO_223_PULLUP+GPIO_223_PULLDOWN, GPIO_223_SELECT},
+ {GPIO_224_SELECT, GPIO_224_TYPE, GPO_224_LEVEL+GPIO_224_STICKY+GPIO_224_PULLUP+GPIO_224_PULLDOWN, GPIO_224_SELECT},
+ {GPIO_225_SELECT, GPIO_225_TYPE, GPO_225_LEVEL+GPIO_225_STICKY+GPIO_225_PULLUP+GPIO_225_PULLDOWN, GPIO_225_SELECT},
+ {GPIO_226_SELECT, GPIO_226_TYPE, GPO_226_LEVEL+GPIO_226_STICKY+GPIO_226_PULLUP+GPIO_226_PULLDOWN, GPIO_226_SELECT},
+ {GPIO_227_SELECT, GPIO_227_TYPE, GPO_227_LEVEL+GPIO_227_STICKY+GPIO_227_PULLUP+GPIO_227_PULLDOWN, GPIO_227_SELECT},
+ {GPIO_228_SELECT, GPIO_228_TYPE, GPO_228_LEVEL+GPIO_228_STICKY+GPIO_228_PULLUP+GPIO_228_PULLDOWN, GPIO_228_SELECT},
+ {GPIO_229_SELECT, GPIO_229_TYPE, GPO_229_LEVEL+GPIO_229_STICKY+GPIO_229_PULLUP+GPIO_229_PULLDOWN, GPIO_229_SELECT},
};
typedef enum _GEVENT_COUNT
{
- GEVENT_00 = 0x60,
- GEVENT_01,
- GEVENT_02,
- GEVENT_03,
- GEVENT_04,
- GEVENT_05,
- GEVENT_06,
- GEVENT_07,
- GEVENT_08,
- GEVENT_09,
- GEVENT_10,
- GEVENT_11,
- GEVENT_12,
- GEVENT_13,
- GEVENT_14,
- GEVENT_15,
- GEVENT_16,
- GEVENT_17,
- GEVENT_18,
- GEVENT_19,
- GEVENT_20,
- GEVENT_21,
- GEVENT_22,
- GEVENT_23
+ GEVENT_00 = 0x60,
+ GEVENT_01,
+ GEVENT_02,
+ GEVENT_03,
+ GEVENT_04,
+ GEVENT_05,
+ GEVENT_06,
+ GEVENT_07,
+ GEVENT_08,
+ GEVENT_09,
+ GEVENT_10,
+ GEVENT_11,
+ GEVENT_12,
+ GEVENT_13,
+ GEVENT_14,
+ GEVENT_15,
+ GEVENT_16,
+ GEVENT_17,
+ GEVENT_18,
+ GEVENT_19,
+ GEVENT_20,
+ GEVENT_21,
+ GEVENT_22,
+ GEVENT_23
} GEVENT_COUNT;
typedef struct _GEVENT_SETTINGS
{
- u8 EventEnable; // 0: Disable, 1: Enable
- u8 SciTrig; // 0: Falling Edge, 1: Rising Edge
- u8 SciLevl; // 0: Edge trigger, 1: Level Trigger
- u8 SmiSciEn; // 0: Not send SMI, 1: Send SMI
- u8 SciS0En; // 0: Disable, 1: Enable
- u8 SciMap; // 0000b->1111b
- u8 SmiTrig; // 0: Active Low, 1: Active High
- u8 SmiControl; // 0: Disable, 1: SMI 2: NMI 3: IRQ13
+ u8 EventEnable; // 0: Disable, 1: Enable
+ u8 SciTrig; // 0: Falling Edge, 1: Rising Edge
+ u8 SciLevl; // 0: Edge trigger, 1: Level Trigger
+ u8 SmiSciEn; // 0: Not send SMI, 1: Send SMI
+ u8 SciS0En; // 0: Disable, 1: Enable
+ u8 SciMap; // 0000b->1111b
+ u8 SmiTrig; // 0: Active Low, 1: Active High
+ u8 SmiControl; // 0: Disable, 1: SMI 2: NMI 3: IRQ13
} GEVENT_SETTINGS;
const GEVENT_SETTINGS gevent_table[] =
{
- {GEVENT_00_EVENTENABLE, GEVENT_00_SCITRIG, GEVENT_00_SCILEVEL, GEVENT_00_SMISCIEN, GEVENT_00_SCIS0EN, GEVENT_00_SCIMAP, GEVENT_00_SMITRIG, GEVENT_00_SMICONTROL},
- {GEVENT_01_EVENTENABLE, GEVENT_01_SCITRIG, GEVENT_01_SCILEVEL, GEVENT_01_SMISCIEN, GEVENT_01_SCIS0EN, GEVENT_01_SCIMAP, GEVENT_01_SMITRIG, GEVENT_01_SMICONTROL},
- {GEVENT_02_EVENTENABLE, GEVENT_02_SCITRIG, GEVENT_02_SCILEVEL, GEVENT_02_SMISCIEN, GEVENT_02_SCIS0EN, GEVENT_02_SCIMAP, GEVENT_02_SMITRIG, GEVENT_02_SMICONTROL},
- {GEVENT_03_EVENTENABLE, GEVENT_03_SCITRIG, GEVENT_03_SCILEVEL, GEVENT_03_SMISCIEN, GEVENT_03_SCIS0EN, GEVENT_03_SCIMAP, GEVENT_03_SMITRIG, GEVENT_03_SMICONTROL},
- {GEVENT_04_EVENTENABLE, GEVENT_04_SCITRIG, GEVENT_04_SCILEVEL, GEVENT_04_SMISCIEN, GEVENT_04_SCIS0EN, GEVENT_04_SCIMAP, GEVENT_04_SMITRIG, GEVENT_04_SMICONTROL},
- {GEVENT_05_EVENTENABLE, GEVENT_05_SCITRIG, GEVENT_05_SCILEVEL, GEVENT_05_SMISCIEN, GEVENT_05_SCIS0EN, GEVENT_05_SCIMAP, GEVENT_05_SMITRIG, GEVENT_05_SMICONTROL},
- {GEVENT_06_EVENTENABLE, GEVENT_06_SCITRIG, GEVENT_06_SCILEVEL, GEVENT_06_SMISCIEN, GEVENT_06_SCIS0EN, GEVENT_06_SCIMAP, GEVENT_06_SMITRIG, GEVENT_06_SMICONTROL},
- {GEVENT_07_EVENTENABLE, GEVENT_07_SCITRIG, GEVENT_07_SCILEVEL, GEVENT_07_SMISCIEN, GEVENT_07_SCIS0EN, GEVENT_07_SCIMAP, GEVENT_07_SMITRIG, GEVENT_07_SMICONTROL},
- {GEVENT_08_EVENTENABLE, GEVENT_08_SCITRIG, GEVENT_08_SCILEVEL, GEVENT_08_SMISCIEN, GEVENT_08_SCIS0EN, GEVENT_08_SCIMAP, GEVENT_08_SMITRIG, GEVENT_08_SMICONTROL},
- {GEVENT_09_EVENTENABLE, GEVENT_09_SCITRIG, GEVENT_09_SCILEVEL, GEVENT_09_SMISCIEN, GEVENT_09_SCIS0EN, GEVENT_09_SCIMAP, GEVENT_09_SMITRIG, GEVENT_09_SMICONTROL},
- {GEVENT_10_EVENTENABLE, GEVENT_10_SCITRIG, GEVENT_10_SCILEVEL, GEVENT_10_SMISCIEN, GEVENT_10_SCIS0EN, GEVENT_10_SCIMAP, GEVENT_10_SMITRIG, GEVENT_10_SMICONTROL},
- {GEVENT_11_EVENTENABLE, GEVENT_11_SCITRIG, GEVENT_11_SCILEVEL, GEVENT_11_SMISCIEN, GEVENT_11_SCIS0EN, GEVENT_11_SCIMAP, GEVENT_11_SMITRIG, GEVENT_11_SMICONTROL},
- {GEVENT_12_EVENTENABLE, GEVENT_12_SCITRIG, GEVENT_12_SCILEVEL, GEVENT_12_SMISCIEN, GEVENT_12_SCIS0EN, GEVENT_12_SCIMAP, GEVENT_12_SMITRIG, GEVENT_12_SMICONTROL},
- {GEVENT_13_EVENTENABLE, GEVENT_13_SCITRIG, GEVENT_13_SCILEVEL, GEVENT_13_SMISCIEN, GEVENT_13_SCIS0EN, GEVENT_13_SCIMAP, GEVENT_13_SMITRIG, GEVENT_13_SMICONTROL},
- {GEVENT_14_EVENTENABLE, GEVENT_14_SCITRIG, GEVENT_14_SCILEVEL, GEVENT_14_SMISCIEN, GEVENT_14_SCIS0EN, GEVENT_14_SCIMAP, GEVENT_14_SMITRIG, GEVENT_14_SMICONTROL},
- {GEVENT_15_EVENTENABLE, GEVENT_15_SCITRIG, GEVENT_15_SCILEVEL, GEVENT_15_SMISCIEN, GEVENT_15_SCIS0EN, GEVENT_15_SCIMAP, GEVENT_15_SMITRIG, GEVENT_15_SMICONTROL},
- {GEVENT_16_EVENTENABLE, GEVENT_16_SCITRIG, GEVENT_16_SCILEVEL, GEVENT_16_SMISCIEN, GEVENT_16_SCIS0EN, GEVENT_16_SCIMAP, GEVENT_16_SMITRIG, GEVENT_16_SMICONTROL},
- {GEVENT_17_EVENTENABLE, GEVENT_17_SCITRIG, GEVENT_17_SCILEVEL, GEVENT_17_SMISCIEN, GEVENT_17_SCIS0EN, GEVENT_17_SCIMAP, GEVENT_17_SMITRIG, GEVENT_17_SMICONTROL},
- {GEVENT_18_EVENTENABLE, GEVENT_18_SCITRIG, GEVENT_18_SCILEVEL, GEVENT_18_SMISCIEN, GEVENT_18_SCIS0EN, GEVENT_18_SCIMAP, GEVENT_18_SMITRIG, GEVENT_18_SMICONTROL},
- {GEVENT_19_EVENTENABLE, GEVENT_19_SCITRIG, GEVENT_19_SCILEVEL, GEVENT_19_SMISCIEN, GEVENT_19_SCIS0EN, GEVENT_19_SCIMAP, GEVENT_19_SMITRIG, GEVENT_19_SMICONTROL},
- {GEVENT_20_EVENTENABLE, GEVENT_20_SCITRIG, GEVENT_20_SCILEVEL, GEVENT_20_SMISCIEN, GEVENT_20_SCIS0EN, GEVENT_20_SCIMAP, GEVENT_20_SMITRIG, GEVENT_20_SMICONTROL},
- {GEVENT_21_EVENTENABLE, GEVENT_21_SCITRIG, GEVENT_21_SCILEVEL, GEVENT_21_SMISCIEN, GEVENT_21_SCIS0EN, GEVENT_21_SCIMAP, GEVENT_21_SMITRIG, GEVENT_21_SMICONTROL},
- {GEVENT_22_EVENTENABLE, GEVENT_22_SCITRIG, GEVENT_22_SCILEVEL, GEVENT_22_SMISCIEN, GEVENT_22_SCIS0EN, GEVENT_22_SCIMAP, GEVENT_22_SMITRIG, GEVENT_22_SMICONTROL},
- {GEVENT_23_EVENTENABLE, GEVENT_23_SCITRIG, GEVENT_23_SCILEVEL, GEVENT_23_SMISCIEN, GEVENT_23_SCIS0EN, GEVENT_23_SCIMAP, GEVENT_23_SMITRIG, GEVENT_23_SMICONTROL},
+ {GEVENT_00_EVENTENABLE, GEVENT_00_SCITRIG, GEVENT_00_SCILEVEL, GEVENT_00_SMISCIEN, GEVENT_00_SCIS0EN, GEVENT_00_SCIMAP, GEVENT_00_SMITRIG, GEVENT_00_SMICONTROL},
+ {GEVENT_01_EVENTENABLE, GEVENT_01_SCITRIG, GEVENT_01_SCILEVEL, GEVENT_01_SMISCIEN, GEVENT_01_SCIS0EN, GEVENT_01_SCIMAP, GEVENT_01_SMITRIG, GEVENT_01_SMICONTROL},
+ {GEVENT_02_EVENTENABLE, GEVENT_02_SCITRIG, GEVENT_02_SCILEVEL, GEVENT_02_SMISCIEN, GEVENT_02_SCIS0EN, GEVENT_02_SCIMAP, GEVENT_02_SMITRIG, GEVENT_02_SMICONTROL},
+ {GEVENT_03_EVENTENABLE, GEVENT_03_SCITRIG, GEVENT_03_SCILEVEL, GEVENT_03_SMISCIEN, GEVENT_03_SCIS0EN, GEVENT_03_SCIMAP, GEVENT_03_SMITRIG, GEVENT_03_SMICONTROL},
+ {GEVENT_04_EVENTENABLE, GEVENT_04_SCITRIG, GEVENT_04_SCILEVEL, GEVENT_04_SMISCIEN, GEVENT_04_SCIS0EN, GEVENT_04_SCIMAP, GEVENT_04_SMITRIG, GEVENT_04_SMICONTROL},
+ {GEVENT_05_EVENTENABLE, GEVENT_05_SCITRIG, GEVENT_05_SCILEVEL, GEVENT_05_SMISCIEN, GEVENT_05_SCIS0EN, GEVENT_05_SCIMAP, GEVENT_05_SMITRIG, GEVENT_05_SMICONTROL},
+ {GEVENT_06_EVENTENABLE, GEVENT_06_SCITRIG, GEVENT_06_SCILEVEL, GEVENT_06_SMISCIEN, GEVENT_06_SCIS0EN, GEVENT_06_SCIMAP, GEVENT_06_SMITRIG, GEVENT_06_SMICONTROL},
+ {GEVENT_07_EVENTENABLE, GEVENT_07_SCITRIG, GEVENT_07_SCILEVEL, GEVENT_07_SMISCIEN, GEVENT_07_SCIS0EN, GEVENT_07_SCIMAP, GEVENT_07_SMITRIG, GEVENT_07_SMICONTROL},
+ {GEVENT_08_EVENTENABLE, GEVENT_08_SCITRIG, GEVENT_08_SCILEVEL, GEVENT_08_SMISCIEN, GEVENT_08_SCIS0EN, GEVENT_08_SCIMAP, GEVENT_08_SMITRIG, GEVENT_08_SMICONTROL},
+ {GEVENT_09_EVENTENABLE, GEVENT_09_SCITRIG, GEVENT_09_SCILEVEL, GEVENT_09_SMISCIEN, GEVENT_09_SCIS0EN, GEVENT_09_SCIMAP, GEVENT_09_SMITRIG, GEVENT_09_SMICONTROL},
+ {GEVENT_10_EVENTENABLE, GEVENT_10_SCITRIG, GEVENT_10_SCILEVEL, GEVENT_10_SMISCIEN, GEVENT_10_SCIS0EN, GEVENT_10_SCIMAP, GEVENT_10_SMITRIG, GEVENT_10_SMICONTROL},
+ {GEVENT_11_EVENTENABLE, GEVENT_11_SCITRIG, GEVENT_11_SCILEVEL, GEVENT_11_SMISCIEN, GEVENT_11_SCIS0EN, GEVENT_11_SCIMAP, GEVENT_11_SMITRIG, GEVENT_11_SMICONTROL},
+ {GEVENT_12_EVENTENABLE, GEVENT_12_SCITRIG, GEVENT_12_SCILEVEL, GEVENT_12_SMISCIEN, GEVENT_12_SCIS0EN, GEVENT_12_SCIMAP, GEVENT_12_SMITRIG, GEVENT_12_SMICONTROL},
+ {GEVENT_13_EVENTENABLE, GEVENT_13_SCITRIG, GEVENT_13_SCILEVEL, GEVENT_13_SMISCIEN, GEVENT_13_SCIS0EN, GEVENT_13_SCIMAP, GEVENT_13_SMITRIG, GEVENT_13_SMICONTROL},
+ {GEVENT_14_EVENTENABLE, GEVENT_14_SCITRIG, GEVENT_14_SCILEVEL, GEVENT_14_SMISCIEN, GEVENT_14_SCIS0EN, GEVENT_14_SCIMAP, GEVENT_14_SMITRIG, GEVENT_14_SMICONTROL},
+ {GEVENT_15_EVENTENABLE, GEVENT_15_SCITRIG, GEVENT_15_SCILEVEL, GEVENT_15_SMISCIEN, GEVENT_15_SCIS0EN, GEVENT_15_SCIMAP, GEVENT_15_SMITRIG, GEVENT_15_SMICONTROL},
+ {GEVENT_16_EVENTENABLE, GEVENT_16_SCITRIG, GEVENT_16_SCILEVEL, GEVENT_16_SMISCIEN, GEVENT_16_SCIS0EN, GEVENT_16_SCIMAP, GEVENT_16_SMITRIG, GEVENT_16_SMICONTROL},
+ {GEVENT_17_EVENTENABLE, GEVENT_17_SCITRIG, GEVENT_17_SCILEVEL, GEVENT_17_SMISCIEN, GEVENT_17_SCIS0EN, GEVENT_17_SCIMAP, GEVENT_17_SMITRIG, GEVENT_17_SMICONTROL},
+ {GEVENT_18_EVENTENABLE, GEVENT_18_SCITRIG, GEVENT_18_SCILEVEL, GEVENT_18_SMISCIEN, GEVENT_18_SCIS0EN, GEVENT_18_SCIMAP, GEVENT_18_SMITRIG, GEVENT_18_SMICONTROL},
+ {GEVENT_19_EVENTENABLE, GEVENT_19_SCITRIG, GEVENT_19_SCILEVEL, GEVENT_19_SMISCIEN, GEVENT_19_SCIS0EN, GEVENT_19_SCIMAP, GEVENT_19_SMITRIG, GEVENT_19_SMICONTROL},
+ {GEVENT_20_EVENTENABLE, GEVENT_20_SCITRIG, GEVENT_20_SCILEVEL, GEVENT_20_SMISCIEN, GEVENT_20_SCIS0EN, GEVENT_20_SCIMAP, GEVENT_20_SMITRIG, GEVENT_20_SMICONTROL},
+ {GEVENT_21_EVENTENABLE, GEVENT_21_SCITRIG, GEVENT_21_SCILEVEL, GEVENT_21_SMISCIEN, GEVENT_21_SCIS0EN, GEVENT_21_SCIMAP, GEVENT_21_SMITRIG, GEVENT_21_SMICONTROL},
+ {GEVENT_22_EVENTENABLE, GEVENT_22_SCITRIG, GEVENT_22_SCILEVEL, GEVENT_22_SMISCIEN, GEVENT_22_SCIS0EN, GEVENT_22_SCIMAP, GEVENT_22_SMITRIG, GEVENT_22_SMICONTROL},
+ {GEVENT_23_EVENTENABLE, GEVENT_23_SCITRIG, GEVENT_23_SCILEVEL, GEVENT_23_SMISCIEN, GEVENT_23_SCIS0EN, GEVENT_23_SCIMAP, GEVENT_23_SMITRIG, GEVENT_23_SMICONTROL},
};
#endif /* _GPIO_H_ */
diff --git a/src/mainboard/amd/torpedo/mainboard.c b/src/mainboard/amd/torpedo/mainboard.c
index d90cb84..86339ef 100644
--- a/src/mainboard/amd/torpedo/mainboard.c
+++ b/src/mainboard/amd/torpedo/mainboard.c
@@ -49,9 +49,9 @@ void set_pcie_dereset(void)
*************************************************/
static void mainboard_enable(device_t dev)
{
- printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable. dev=0x%p\n", dev);
+ printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable. dev=0x%p\n", dev);
}
struct chip_operations mainboard_ops = {
- .enable_dev = mainboard_enable,
+ .enable_dev = mainboard_enable,
};
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