[coreboot-gerrit] New patch to review for coreboot: northbridge/amd/agesa/family10: Remove commented code
HAOUAS Elyes (ehaouas@noos.fr)
gerrit at coreboot.org
Wed Oct 5 18:45:29 CEST 2016
HAOUAS Elyes (ehaouas at noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16886
-gerrit
commit 64cbfdc134888b8bd628a9a97ec5e5d07fa0bfa8
Author: Elyes HAOUAS <ehaouas at noos.fr>
Date: Wed Oct 5 18:20:36 2016 +0200
northbridge/amd/agesa/family10: Remove commented code
Change-Id: I7966f996a4291cc6b97b53aba59b43358de94e45
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
src/northbridge/amd/agesa/family10/northbridge.c | 11 -----------
1 file changed, 11 deletions(-)
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c
index 2c9f3aa..449c5b4 100644
--- a/src/northbridge/amd/agesa/family10/northbridge.c
+++ b/src/northbridge/amd/agesa/family10/northbridge.c
@@ -171,17 +171,6 @@ static void set_io_addr_reg(device_t dev, u32 nodeid, u32 linkn, u32 reg,
pci_write_config32(__f1_dev[i], reg+4, tempreg);
tempreg = 3 /*| (3<<4)*/ | ((io_min&0xf0)<<(12-4)); //base :ISA and VGA ?
-#if 0
- // FIXME: can we use VGA reg instead?
- if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
- printk(BIOS_SPEW, "%s, enabling legacy VGA IO forwarding for %s link %s\n",
- __func__, dev_path(dev), link);
- tempreg |= PCI_IO_BASE_VGA_EN;
- }
- if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_NO_ISA) {
- tempreg |= PCI_IO_BASE_NO_ISA;
- }
-#endif
for (i = 0; i < sysconf.nodes; i++)
pci_write_config32(__f1_dev[i], reg, tempreg);
}
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