[coreboot-gerrit] Patch set updated for coreboot: intel/i945: Use "IS_ENABLED" for fsbclk & memclk

[HAOUAS Elyes (ehaouas@noos.fr)]

HAOUAS Elyes (ehaouas at noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16958

-gerrit

commit e41c0119224bfcb725886bbdbf6fe23e76ffebe1
Author: Elyes HAOUAS <ehaouas at noos.fr>
Date:   Sun Oct 9 20:24:20 2016 +0200

    intel/i945: Use "IS_ENABLED" for fsbclk & memclk
    
    Change-Id: I3213a8664955239b10bcf1784ce1ba5e0d95688b
    Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
 src/northbridge/intel/i945/raminit.c | 41 ++++++++++++++++--------------------
 1 file changed, 18 insertions(+), 23 deletions(-)

diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 0b9e95c..40f2d0d 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -106,10 +106,8 @@ void sdram_dump_mchbar_registers(void)
 
 static int memclk(void)
 {
-	int offset = 0;
-#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM
-	offset++;
-#endif
+	int offset = IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM) ? 1 : 0;
+
 	switch (((MCHBAR32(CLKCFG) >> 4) & 7) - offset) {
 	case 1: return 400;
 	case 2: return 533;
@@ -119,29 +117,26 @@ static int memclk(void)
 	return -1;
 }
 
-#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM
 static u16 fsbclk(void)
 {
-	switch (MCHBAR32(CLKCFG) & 7) {
-	case 0: return 400;
-	case 1: return 533;
-	case 3: return 667;
-	default: printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", MCHBAR32(CLKCFG) & 7);
-	}
-	return 0xffff;
-}
-#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC
-static u16 fsbclk(void)
-{
-	switch (MCHBAR32(CLKCFG) & 7) {
-	case 0: return 1066;
-	case 1: return 533;
-	case 2: return 800;
-	default: printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", MCHBAR32(CLKCFG) & 7);
+	if IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM) {
+		switch (MCHBAR32(CLKCFG) & 7) {
+		case 0: return 400;
+		case 1: return 533;
+		case 3: return 667;
+		default: printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", MCHBAR32(CLKCFG) & 7);
+		}
+		return 0xffff;
+	} else if IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC) {
+		switch (MCHBAR32(CLKCFG) & 7) {
+		case 0: return 1066;
+		case 1: return 533;
+		case 2: return 800;
+		default: printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", MCHBAR32(CLKCFG) & 7);
+		}
+		return 0xffff;
 	}
-	return 0xffff;
 }
-#endif
 
 static int sdram_capabilities_max_supported_memory_frequency(void)
 {