[coreboot-gerrit] Patch merged into coreboot/master: lenovo/x60: CST table: use MWAIT requests instead of P_LVLx I/O reads
gerrit at coreboot.org
gerrit at coreboot.org
Tue Oct 11 23:34:23 CEST 2016
the following patch was just integrated into master:
commit e1f0ac4baa1bbe561276bee8ebc20fe86b0f8cc2
Author: Arthur Heymans <arthur at aheymans.xyz>
Date: Thu May 19 16:02:38 2016 +0200
lenovo/x60: CST table: use MWAIT requests instead of P_LVLx I/O reads
Requesting low power acpi cpu c-states has two software interfaces:
Using P_LVLx I/O reads or using equivalent MWAIT requests.
This change makes it more consistent with newer targets that use MWAIT
requests.
There also exists extended intel acpi c-states which can be enabled
in two ways:
- using a substate hint to the mwait request (defined in bios);
- setting a model specific register (msr)
Currently this is done by setting the right msr bits but with this
change one can experiment by adding substate hints.
Change-Id: I9eeb5b008e2ddc2193725667f2c13582a4877e3c
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
Reviewed-on: https://review.coreboot.org/14801
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth at google.com>
Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
See https://review.coreboot.org/14801 for details.
-gerrit
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