[coreboot-gerrit] Patch merged into coreboot/master: nb/i945/gma.c: correct VSYNC end offset

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit c8c73a68beb199b9612c91e30ea541449957bc1a
Author: Arthur Heymans <arthur at aheymans.xyz>
Date:   Thu Oct 13 14:12:45 2016 +0200

    nb/i945/gma.c: correct VSYNC end offset
    
    According to "G45: Volume 3: Display Register Intel ® 965G Express
    Chipset Family and Intel ® G35 Express Chipset Graphics Controller" the
    VSYNC end should start at bit 16. This is also how Linux (at least 4.4)
    sets this register, which can be seen with intel-gpu-tools.
    
    TESTED on Lenovo thinkpad X60 (it does not change anything).
    
    Change-Id: Ie222ac13211a91c4fbc580e2bf9de0d973ea9a3a
    Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
    Reviewed-on: https://review.coreboot.org/17015
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-by: Nico Huber <nico.h at gmx.de>
    Reviewed-by: Alexander Couzens <lynxis at fe80.eu>


See https://review.coreboot.org/17015 for details.

-gerrit