[coreboot-gerrit] Patch set updated for coreboot: nb/i945/raminit: Add fix for clock crossing for 800MHz FSB CPU

Arthur Heymans (arthur@aheymans.xyz) gerrit at coreboot.org
Sun Oct 16 11:38:34 CEST 2016


Arthur Heymans (arthur at aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17038

-gerrit

commit effe151cc70f5d15c83fd77af88ef0f75e44a317
Author: Arthur Heymans <arthur at aheymans.xyz>
Date:   Sun Oct 16 10:58:01 2016 +0200

    nb/i945/raminit: Add fix for clock crossing for 800MHz FSB CPU
    
    The cross clocking of 800MHz FSB CPU with 667MHz RAM was incorrect.
    The result is that 800MHz FSB CPUs now properly work with 667MHz RAM.
    
    Value taken from vendor bios on ga-945gcm-s2l and suggested by Haouas
    Elyes.
    
    Change-Id: I56c12af50c75a735af0150a4e7bce4faacc93648
    Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
 src/northbridge/intel/i945/raminit.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index b854580..92e6f15 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -2266,7 +2266,7 @@ static void sdram_program_clock_crossing(void)
 
 		0x02010804, 0x00000000, /* DDR400 FSB800 */
 		0x00010402, 0x00000000, /* DDR533 FSB800 */
-		0x04020180, 0x00000008, /* DDR667 FSB800 */
+		0x04020130, 0x00000008, /* DDR667 FSB800 */
 
 		0x00020904, 0x00000000, /* DDR400 FSB1066 */
 		0x02010804, 0x00000000, /* DDR533 FSB1066 */



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