[coreboot-gerrit] New patch to review for coreboot: gm45/raminit.c: Use LAPIC udelay instead of custom version
Arthur Heymans (arthur@aheymans.xyz)
gerrit at coreboot.org
Thu Oct 27 00:46:54 CEST 2016
Arthur Heymans (arthur at aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17152
-gerrit
commit bed6660c916f53729d873530f26abc4f583a5354
Author: Arthur Heymans <arthur at aheymans.xyz>
Date: Thu Oct 27 00:31:41 2016 +0200
gm45/raminit.c: Use LAPIC udelay instead of custom version
This change may slow down the raminit by maximum 200usec,
but reuses the the lapic udelay definition.
Change-Id: I60a68f8a7911b257c0eecda96f7c5bf302bb51ed
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
src/northbridge/intel/gm45/Kconfig | 1 -
src/northbridge/intel/gm45/Makefile.inc | 1 -
src/northbridge/intel/gm45/raminit.c | 6 +++---
3 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index d254b9e..6ee6558 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -26,7 +26,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select VGA
select INTEL_EDID
select INTEL_GMA_ACPI
- select UDELAY_TSC
config CBFS_SIZE
hex
diff --git a/src/northbridge/intel/gm45/Makefile.inc b/src/northbridge/intel/gm45/Makefile.inc
index 794b2b9..ac5810b 100644
--- a/src/northbridge/intel/gm45/Makefile.inc
+++ b/src/northbridge/intel/gm45/Makefile.inc
@@ -17,7 +17,6 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_GM45),y)
romstage-y += early_init.c
romstage-y += early_reset.c
-romstage-y += delay.c
romstage-y += raminit.c
romstage-y += raminit_rcomp_calibration.c
romstage-y += raminit_receive_enable_calibration.c
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
index 37b44cc..a2141cd 100644
--- a/src/northbridge/intel/gm45/raminit.c
+++ b/src/northbridge/intel/gm45/raminit.c
@@ -916,15 +916,15 @@ static void rcomp_initialization(const stepping_t stepping, const int sff)
static void dram_powerup(const int resume)
{
- udelay_from_reset(200);
+ udelay(200);
MCHBAR32(CLKCFG_MCHBAR) = (MCHBAR32(CLKCFG_MCHBAR) & ~(1 << 3)) | (3 << 21);
if (!resume) {
MCHBAR32(0x1434) |= (1 << 10);
- ns100delay(2);
+ udelay(1);
}
MCHBAR32(0x1434) |= (1 << 6);
if (!resume) {
- ns100delay(1);
+ udelay(1);
MCHBAR32(0x1434) |= (1 << 9);
MCHBAR32(0x1434) &= ~(1 << 10);
udelay(500);
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