[coreboot-gerrit] Patch set updated for coreboot: drivers/intel/fsp2_0: Allow use of MRC cache data in recovery

[Andrey Petrov (andrey.petrov@intel.com)]

Andrey Petrov (andrey.petrov at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17165

-gerrit

commit 244f85bfb7aea053092a722a2b2818cf03719408
Author: Andrey Petrov <andrey.petrov at intel.com>
Date:   Thu Oct 27 10:12:22 2016 -0700

    drivers/intel/fsp2_0: Allow use of MRC cache data in recovery
    
    Add a configuration option to allow using MRC cache in recovery
    boot, off by default. This can be overridden by Chrome EC if it
    requests retrain.
    
    BUG=chrome-os-partner:56643
    BRANCH=none
    TEST=invoke power-alt-refresh key combination, notice memory is retrained
    in recovery
    
    Change-Id: I31a87afc8a70c17e488c06e42da4acbb2dde3f5d
    Signed-off-by: Andrey Petrov <andrey.petrov at intel.com>
---
 src/drivers/intel/fsp2_0/Kconfig       | 7 +++++++
 src/drivers/intel/fsp2_0/memory_init.c | 9 +++++++--
 src/soc/intel/apollolake/Kconfig       | 1 +
 3 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index c653148..75e3901 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -94,4 +94,11 @@ config RESET_ON_INVALID_RAMSTAGE_CACHE
 	bool "Reset the system on S3 wake when ramstage cache invalid."
 	default n
 
+config FSP_RECOVERY_USE_MRCCACHE
+	bool "Use MRC cache in recovery boot"
+	depends on CACHE_MRC_SETTINGS
+	default n
+	help
+	  Select yes if you want recovery boot to use MRC cache.
+
 endif
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index d0a22ce..70379c3 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -113,12 +113,17 @@ static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, bool s3wake,
 	if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS))
 		return;
 
-	/* Don't use saved training data when recovery mode is enabled. */
-	if (vboot_recovery_mode_enabled()) {
+	if (!IS_ENABLED(CONFIG_FSP_RECOVERY_USE_MRCCACHE)) {
 		printk(BIOS_SPEW, "Recovery mode. Not using MRC cache.\n");
 		return;
 	}
 
+	/* If recovery with full retrain is requested do not load cache */
+	if (vboot_recovery_mode_memory_retrain()) {
+		printk(BIOS_SPEW, "Recovery with forced memory retrain.\n");
+		return;
+	}
+
 	if (mrc_cache_get_current_with_version(&mrc_cache, fsp_version)) {
 		printk(BIOS_SPEW, "MRC cache was not found\n");
 		return;
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 187214a..39cab36 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -74,6 +74,7 @@ config CHROMEOS
 	select VBOOT_VBNV_CMOS
 	select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH
 	select VIRTUAL_DEV_SWITCH
+	select FSP_RECOVERY_USE_MRCCACHE
 
 config TPM_ON_FAST_SPI
 	bool