[coreboot-gerrit] New patch to review for coreboot: lib/prog_loaders: use common ramstage_cache_invalid()
Aaron Durbin (adurbin@chromium.org)
gerrit at coreboot.org
Sat Oct 29 00:37:27 CEST 2016
Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17184
-gerrit
commit 8f011f21de643cab71bcf9df33238a6180b68148
Author: Aaron Durbin <adurbin at chromium.org>
Date: Fri Oct 28 17:32:24 2016 -0500
lib/prog_loaders: use common ramstage_cache_invalid()
All current implementations of ramstage_cache_invalid() were just
resetting the system based on the RESET_ON_INVALID_RAMSTAGE_CACHE
Kconfig option. Move that behavior to a single implementation
within prog_loaders.c which removes duplication.
Change-Id: I67aae73f9e1305732f90d947fe57c5aaf66ada9e
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
src/cpu/intel/haswell/romstage.c | 10 ----------
src/drivers/intel/fsp1_1/romstage.c | 7 -------
src/drivers/intel/fsp2_0/stage_cache.c | 7 -------
src/include/program_loading.h | 3 ---
src/lib/prog_loaders.c | 10 +++++++++-
src/soc/intel/baytrail/romstage/romstage.c | 8 --------
src/soc/intel/broadwell/romstage/romstage.c | 8 --------
7 files changed, 9 insertions(+), 44 deletions(-)
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 8b62d43..f823c55 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -264,13 +264,3 @@ void asmlinkage romstage_after_car(void)
/* Load the ramstage. */
run_ramstage();
}
-
-
-#if IS_ENABLED(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM)
-void ramstage_cache_invalid(void)
-{
-#if CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE
- reset_system();
-#endif
-}
-#endif
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index a95e5e6..97379b2 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -380,13 +380,6 @@ __attribute__((weak)) void raminit(struct romstage_params *params)
die("ERROR - No RAM initialization specified!\n");
}
-void ramstage_cache_invalid(void)
-{
- if (IS_ENABLED(CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE))
- /* Perform cold reset on invalid ramstage cache. */
- hard_reset();
-}
-
/* Display the memory configuration */
__attribute__((weak)) void report_memory_config(void)
{
diff --git a/src/drivers/intel/fsp2_0/stage_cache.c b/src/drivers/intel/fsp2_0/stage_cache.c
index 4469a7f..434eae9 100644
--- a/src/drivers/intel/fsp2_0/stage_cache.c
+++ b/src/drivers/intel/fsp2_0/stage_cache.c
@@ -28,10 +28,3 @@ void stage_cache_external_region(void **base, size_t *size)
*size = 0;
}
}
-
-void ramstage_cache_invalid(void)
-{
- if (IS_ENABLED(CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE))
- /* Perform cold reset on invalid ramstage cache. */
- hard_reset();
-}
diff --git a/src/include/program_loading.h b/src/include/program_loading.h
index 3958fda..08687f3 100644
--- a/src/include/program_loading.h
+++ b/src/include/program_loading.h
@@ -167,9 +167,6 @@ void run_romstage(void);
/* Run ramstage from romstage. */
void run_ramstage(void);
-/* Called when the stage cache couldn't load ramstage on resume. */
-void ramstage_cache_invalid(void);
-
/* Determine where stack for ramstage loader is located. */
enum { ROMSTAGE_STACK_CBMEM, ROMSTAGE_STACK_LOW_MEM };
uintptr_t romstage_ram_stack_base(size_t size, int src);
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c
index c0dcd60..b187b0c 100644
--- a/src/lib/prog_loaders.c
+++ b/src/lib/prog_loaders.c
@@ -74,7 +74,15 @@ void __attribute__((weak)) stage_cache_add(int stage_id,
const struct prog *stage) {}
void __attribute__((weak)) stage_cache_load_stage(int stage_id,
struct prog *stage) {}
-void __attribute__((weak)) ramstage_cache_invalid(void) {}
+
+static void ramstage_cache_invalid(void)
+{
+ printk(BIOS_ERR, "ramstage cache invalid.\n");
+ if (IS_ENABLED(CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE)) {
+ hard_reset();
+ halt();
+ }
+}
static void run_ramstage_from_resume(struct romstage_handoff *handoff,
struct prog *ramstage)
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index 2b51744..9cf110e 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -333,14 +333,6 @@ static void *setup_stack_and_mttrs(void)
return slot;
}
-void ramstage_cache_invalid(void)
-{
-#if CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE
- /* Perform cold reset on invalid ramstage cache. */
- cold_reset();
-#endif
-}
-
int get_sw_write_protect_state(void)
{
u8 status;
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index f2b28a5..44df88c 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -133,14 +133,6 @@ void asmlinkage romstage_after_car(void)
while (1);
}
-void ramstage_cache_invalid(void)
-{
-#if CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE
- /* Perform cold reset on invalid ramstage cache. */
- reset_system();
-#endif
-}
-
int get_sw_write_protect_state(void)
{
u8 status;
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