[coreboot-gerrit] New patch to review for coreboot: nb/i945/early_init.c: Add FSB800 to Egress Port Virtual Channel

[HAOUAS Elyes (ehaouas@noos.fr)]

HAOUAS Elyes (ehaouas at noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17198

-gerrit

commit 87a95314ac841968b1a54a0202d10bd6545d7001
Author: Elyes HAOUAS <ehaouas at noos.fr>
Date:   Mon Oct 31 18:55:04 2016 +0100

    nb/i945/early_init.c: Add FSB800 to Egress Port Virtual Channel
    
    This is based on vendor bios.
    It needs test.
    
    Change-Id: Ib90e8ea1b82f2fcc3b5c199cace32a7f0aff4b5c
    Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
 src/northbridge/intel/i945/early_init.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index 4373167..25a1f9c 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -233,6 +233,8 @@ static void i945_setup_egress_port(void)
 	reg32 &= 0xffffff00;
 	if ((MCHBAR32(CLKCFG) & 7) == 1)
 		reg32 |= 0x0d;	/* 533MHz */
+	if ((MCHBAR32(CLKCFG) & 7) == 2)
+		reg32 |= 0x14;	/* 800MHz */
 	if ((MCHBAR32(CLKCFG) & 7) == 3)
 		reg32 |= 0x10;	/* 667MHz */
 	EPBAR32(0x2c) = reg32;
@@ -249,6 +251,11 @@ static void i945_setup_egress_port(void)
 		EPBAR32(EPVC1IST + 4) = 0x009c009c;
 	}
 
+	if ((MCHBAR32(CLKCFG) & 7) == 2) {	/* 800MHz */
+		EPBAR32(EPVC1IST + 0) = 0x00f000f0;
+		EPBAR32(EPVC1IST + 4) = 0x00f000f0;
+	}
+
 	if ((MCHBAR32(CLKCFG) & 7) == 3) {	/* 667MHz */
 		EPBAR32(EPVC1IST + 0) = 0x00c000c0;
 		EPBAR32(EPVC1IST + 4) = 0x00c000c0;