[coreboot-gerrit] Patch set updated for coreboot: google/reef: Enable 20K pull ups for LPC CLKRUN and LAD0:3 lines

[Aaron Durbin (adurbin@chromium.org)]

Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16426

-gerrit

commit 4a9fb7e915bd3cd86390a57b9d337bc94f827caa
Author: Shamile Khan <shamile.khan at intel.com>
Date:   Thu Sep 1 13:36:50 2016 -0700

    google/reef: Enable 20K pull ups for LPC CLKRUN and LAD0:3 lines
    
    The pull up for CLKRUN is required to resolve keyboard slowness
    and malfunctioning observed on some reef systems. The CLKRUN
    signal was probed and found to be floating when the pull up
    was not enabled. Also Added pull ups for the LPC Multiplexed
    command, address and data lines LAD0:3 because the LPC
    Interface specification requires them.
    
    BUG=chrome-os-partner:55586
    BRANCH=none
    TEST=When a key is pressed, the character is immediately visible
         on the screen. Also the interrupt count for i8042 increments
         immediately in /proc/interrupts.
    
    Change-Id: I16df1a0301a3994c926a609f61291761219f9e01
    Signed-off-by: Shamile Khan <shamile.khan at intel.com>
---
 src/mainboard/google/reef/variants/baseboard/gpio.c | 10 +++++-----
 src/soc/intel/apollolake/lpc_lib.c                  |  9 +++++----
 2 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/src/mainboard/google/reef/variants/baseboard/gpio.c b/src/mainboard/google/reef/variants/baseboard/gpio.c
index 828fc34..eb1b2eb 100644
--- a/src/mainboard/google/reef/variants/baseboard/gpio.c
+++ b/src/mainboard/google/reef/variants/baseboard/gpio.c
@@ -77,11 +77,11 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_NF(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1), /* LPC_SERIRQ */
 	PAD_CFG_NF(LPC_CLKOUT0, NONE, DEEP, NF1), /* LPC_CLKOUT0 */
 	PAD_CFG_GPI(LPC_CLKOUT1, UP_20K, DEEP),	 /* LPC_CLKOUT1 -- unused */
-	PAD_CFG_NF(LPC_AD0, NATIVE, DEEP, NF1),	 /* LPC_AD0 */
-	PAD_CFG_NF(LPC_AD1, NATIVE, DEEP, NF1),	 /* LPC_AD1 */
-	PAD_CFG_NF(LPC_AD2, NATIVE, DEEP, NF1),	 /* LPC_AD2 */
-	PAD_CFG_NF(LPC_AD3, NATIVE, DEEP, NF1),	 /* LPC_AD3 */
-	PAD_CFG_NF(LPC_CLKRUNB, NATIVE, DEEP, NF1), /* LPC_CLKRUN_N */
+	PAD_CFG_NF(LPC_AD0, UP_20K, DEEP, NF1),	 /* LPC_AD0 */
+	PAD_CFG_NF(LPC_AD1, UP_20K, DEEP, NF1),	 /* LPC_AD1 */
+	PAD_CFG_NF(LPC_AD2, UP_20K, DEEP, NF1),	 /* LPC_AD2 */
+	PAD_CFG_NF(LPC_AD3, UP_20K, DEEP, NF1),	 /* LPC_AD3 */
+	PAD_CFG_NF(LPC_CLKRUNB, UP_20K, DEEP, NF1), /* LPC_CLKRUN_N */
 	PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1), /* LPC_FRAME_N */
 
 	/* I2C0 - Audio */
diff --git a/src/soc/intel/apollolake/lpc_lib.c b/src/soc/intel/apollolake/lpc_lib.c
index 7627fea..f435047 100644
--- a/src/soc/intel/apollolake/lpc_lib.c
+++ b/src/soc/intel/apollolake/lpc_lib.c
@@ -47,10 +47,11 @@ static const struct lpc_mmio_range {
 
 static const struct pad_config lpc_gpios[] = {
 	PAD_CFG_NF(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(LPC_AD0, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(LPC_AD1, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(LPC_AD2, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(LPC_AD3, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(LPC_CLKRUNB, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(LPC_AD0, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(LPC_AD1, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(LPC_AD2, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(LPC_AD3, UP_20K, DEEP, NF1),
 	PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1),
 	PAD_CFG_NF(LPC_CLKOUT0, UP_20K, DEEP, NF1),
 	PAD_CFG_NF(LPC_CLKOUT1, UP_20K, DEEP, NF1)