[coreboot-gerrit] Patch set updated for coreboot: mainboard/intel/kunimitsu:[WIP] Add FSP 2.0 support in ramstage

[Rizwan Qureshi (rizwan.qureshi@intel.com)]

Rizwan Qureshi (rizwan.qureshi at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16356

-gerrit

commit 5d4d6947f28c88520aaa3e4fe650b584139551c7
Author: Rizwan Qureshi <rizwan.qureshi at intel.com>
Date:   Tue Aug 30 20:50:03 2016 +0530

    mainboard/intel/kunimitsu:[WIP] Add FSP 2.0 support in ramstage
    
    Add FSP 2.0 support in ramstage populate required
    Fsp Silicon Init params and configure mainboard specific GPIOs.
    
    Change-Id: I8a9ef156a4dea89b80757f2a186d7181526b805a
---
 src/mainboard/intel/kunimitsu/devicetree.cb | 3 +++
 src/mainboard/intel/kunimitsu/ramstage.c    | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb
index a5789b0..ee3dcf6 100644
--- a/src/mainboard/intel/kunimitsu/devicetree.cb
+++ b/src/mainboard/intel/kunimitsu/devicetree.cb
@@ -193,6 +193,9 @@ chip soc/intel/skylake
 	# Use default SD card detect GPIO configuration
 	register "sdcard_cd_gpio_default" = "GPP_A7"
 
+	# Enable/Disable VMX
+	register "VmxEnable" = "0"
+
 	device cpu_cluster 0 on
 		device lapic 0 on end
 	end
diff --git a/src/mainboard/intel/kunimitsu/ramstage.c b/src/mainboard/intel/kunimitsu/ramstage.c
index 44fb9cd..c67bf79 100644
--- a/src/mainboard/intel/kunimitsu/ramstage.c
+++ b/src/mainboard/intel/kunimitsu/ramstage.c
@@ -13,11 +13,13 @@
  * GNU General Public License for more details.
  */
 
+#include <console/console.h>
 #include <soc/ramstage.h>
 #include "gpio.h"
 
 void mainboard_silicon_init_params(FSP_SIL_UPD *params)
 {
+	printk(BIOS_DEBUG, "Configure Gpio...\n");
 	/* Configure pads prior to SiliconInit() in case there's any
 	 * dependencies during hardware initialization. */
 	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));