[coreboot-gerrit] New patch to review for coreboot: Added Pch-Lp or Pch-H support

[Boon Tiong Teo (boon.tiong.teo@intel.com)]

Boon Tiong Teo (boon.tiong.teo at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16520

-gerrit

commit 7248e666738d88f6cd0ee15ab186c40a49f63243
Author: bteo1 <boon.tiong.teo at intel.com>
Date:   Tue Sep 6 12:54:41 2016 +0800

    Added Pch-Lp or Pch-H support
    
    Change-Id: I952ab0372afddd8dd434dc9667a5345d2ae9e108
    Signed-off-by: bteo1 <boon.tiong.teo at intel.com>
---
 src/mainboard/intel/sklsdlbrk/Kconfig |  3 ++-
 src/soc/intel/skylake/Kconfig         | 16 ++++++++++++++++
 2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/intel/sklsdlbrk/Kconfig b/src/mainboard/intel/sklsdlbrk/Kconfig
index 5f8537c..47c36ab 100644
--- a/src/mainboard/intel/sklsdlbrk/Kconfig
+++ b/src/mainboard/intel/sklsdlbrk/Kconfig
@@ -2,11 +2,12 @@ if BOARD_INTEL_SKLSDLBRK
 
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
-	select BOARD_ROMSIZE_KB_16384
+	select BOARD_ROMSIZE_KB_4096
 #	select CACHE_ROM
 #	select CHROMEOS
 #	select CHROMEOS_RAMOOPS_DYNAMIC
 #	select CHROMEOS_VBNV_CMOS
+	select SOC_PCH_H
 	select HAVE_ACPI_RESUME
 	select HAVE_ACPI_TABLES
 	select HAVE_OPTION_TABLE
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index edf5db3..302556b7 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -169,6 +169,22 @@ config UART_DEBUG
 	select DRIVERS_UART_8250MEM_32
 	select NO_UART_ON_SUPERIO
 
+choice
+	prompt "SOC PCH TYPE"
+	default SOC_PCH_H
+	default SOC_PCH_LP
+
+config SOC_PCH_H
+	bool "PCH-H"
+	help
+	  Choose this option if you have a PCH-H chipset.
+
+config SOC_PCH_LP
+	bool "PCH-LP"
+	help
+	  Choose this option if you have a PCH-LP chipset.
+endchoice
+
 config CHIPSET_BOOTBLOCK_INCLUDE
 	string
 	default "soc/intel/skylake/bootblock/timestamp.inc"