[coreboot-gerrit] Patch set updated for coreboot: [NEEDS TESTING] lenovo/T400: correct GPIO for hybrid driver

Arthur Heymans (arthur@aheymans.xyz) gerrit at coreboot.org
Thu Sep 8 02:59:21 CEST 2016


Arthur Heymans (arthur at aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16354

-gerrit

commit d2c12c5e7d361aab2b3bf3f0b4dcdc43bf69af89
Author: Arthur Heymans <arthur at aheymans.xyz>
Date:   Tue Aug 30 13:42:33 2016 +0200

    [NEEDS TESTING] lenovo/T400: correct GPIO for hybrid driver
    
    Currently the hybrid driver uses GPIO 52 to configure mux. This is not
    the right GPIO on the T400 according to the schematics "MALIBU-3 EXT".
    It should be GPIO22.
    
    The polarities on the gpio's are also set differently on Lenovo T400.
    On the Lenovo T400 HIGH on GPIO22 means enable.
    
    Previously also gpio 49 (GFX_PWR_EN) and 19 (BKLT_CTRL_SEL),
    were configured for hybrid graphics to work on T400,
    but this was reverted in 14d1a93e: "Revert mainboard/lenovo/t400:
    Add initial hybrid graphics support".
    This patch sets those gpios correctly again for the Lenovo T400.
    
    This also adds a IDG disable op, since it is used here to uncleam the
    VGA from the IGD.
    
    Change-Id: I3167303abeb6b3711d53508c61a340d03b1e050a
    Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
 src/drivers/lenovo/Kconfig           |  5 +++++
 src/drivers/lenovo/hybrid_graphics.c | 24 ++++++++++++++++++++++--
 src/mainboard/lenovo/t400/Kconfig    | 16 ++++++++++++++++
 src/mainboard/lenovo/t400/romstage.c | 12 ++++++++++++
 src/northbridge/intel/gm45/gma.c     | 13 +++++++++++++
 5 files changed, 68 insertions(+), 2 deletions(-)

diff --git a/src/drivers/lenovo/Kconfig b/src/drivers/lenovo/Kconfig
index 38b86da..4c62de1 100644
--- a/src/drivers/lenovo/Kconfig
+++ b/src/drivers/lenovo/Kconfig
@@ -39,3 +39,8 @@ config HYBRID_GRAPHICS_GPIO_NUM
 	help
 	  Set a default GPIO that sets the panel LVDS signal routing to
 	  integrated or discrete GPU.
+
+config ENABLE_DISCRETE_IS_HIGH
+	depends on DRIVERS_LENOVO_HYBRID_GRAPHICS
+	bool
+	default n
diff --git a/src/drivers/lenovo/hybrid_graphics.c b/src/drivers/lenovo/hybrid_graphics.c
index 9b46646..f5153f1 100644
--- a/src/drivers/lenovo/hybrid_graphics.c
+++ b/src/drivers/lenovo/hybrid_graphics.c
@@ -43,9 +43,21 @@
 static void hybrid_graphics_disable_peg(struct device *dev)
 {
 	struct device *peg_dev;
+	u8 disable_lvl = CONFIG_ENABLE_DISCRETE_IS_HIGH ?
+		GPIO_LEVEL_LOW : GPIO_LEVEL_HIGH;
 
 	/* connect LVDS interface to iGPU */
-	set_gpio(CONFIG_HYBRID_GRAPHICS_GPIO_NUM, GPIO_LEVEL_HIGH);
+	set_gpio(CONFIG_HYBRID_GRAPHICS_GPIO_NUM, disable_lvl);
+	/* configure BKLT_CTL */
+	if (CONFIG_BKLT_CTRL_SEL_GPIO)
+		set_gpio(CONFIG_BKLT_CTRL_SEL_GPIO, disable_lvl);
+	/* configure DGFX_PWRGD */
+	if (CONFIG_DGFX_PWRGD_GPIO)
+		set_gpio(CONFIG_DGFX_PWRGD_GPIO, disable_lvl);
+	/* configure GFX_PWR_EN_GPIO */
+	if (CONFIG_GFX_PWR_EN_GPIO)
+		set_gpio(CONFIG_GFX_PWR_EN_GPIO, disable_lvl);
+
 	printk(BIOS_DEBUG, "Hybrid graphics: Switching panel to integrated GPU.\n");
 	dev->enabled = 0;
 
@@ -62,13 +74,21 @@ static void hybrid_graphics_disable_peg(struct device *dev)
 static void hybrid_graphics_enable_peg(struct device *dev)
 {
 	u8 hybrid_graphics_mode;
+	u8 enable_lvl = CONFIG_ENABLE_DISCRETE_IS_HIGH ?
+		GPIO_LEVEL_HIGH : GPIO_LEVEL_LOW;
 
 	hybrid_graphics_mode = HYBRID_GRAPHICS_INTEGRATED;
 	get_option(&hybrid_graphics_mode, "hybrid_graphics_mode");
 
 	if (hybrid_graphics_mode == HYBRID_GRAPHICS_DISCRETE) {
 		/* connect LVDS interface to dGPU */
-		set_gpio(CONFIG_HYBRID_GRAPHICS_GPIO_NUM, GPIO_LEVEL_LOW);
+		set_gpio(CONFIG_HYBRID_GRAPHICS_GPIO_NUM, enable_lvl);
+		if (CONFIG_BKLT_CTRL_SEL_GPIO)
+			set_gpio(CONFIG_BKLT_CTRL_SEL_GPIO, enable_lvl);
+		if (CONFIG_DGFX_PWRGD_GPIO)
+			set_gpio(CONFIG_DGFX_PWRGD_GPIO, enable_lvl);
+		if (CONFIG_GFX_PWR_EN_GPIO)
+			set_gpio(CONFIG_GFX_PWR_EN_GPIO, enable_lvl);
 		printk(BIOS_DEBUG, "Hybrid graphics: Switching panel to discrete GPU.\n");
 		dev->enabled = 1;
 
diff --git a/src/mainboard/lenovo/t400/Kconfig b/src/mainboard/lenovo/t400/Kconfig
index a444bf8..a136dd0 100644
--- a/src/mainboard/lenovo/t400/Kconfig
+++ b/src/mainboard/lenovo/t400/Kconfig
@@ -56,4 +56,20 @@ config ONBOARD_VGA_IS_PRIMARY
 	bool
 	default y
 
+config HYBRID_GRAPHICS_GPIO_NUM
+	int
+	default 22
+
+config BKLT_CTRL_SEL_GPIO
+	int
+	default 19
+
+config GFX_PWR_EN_GPIO
+	int
+	default 49
+
+config ENABLE_DISCRETE_IS_HIGH
+	bool
+	default y
+
 endif # BOARD_LENOVO_T400
diff --git a/src/mainboard/lenovo/t400/romstage.c b/src/mainboard/lenovo/t400/romstage.c
index bba53d1..7cf0f90 100644
--- a/src/mainboard/lenovo/t400/romstage.c
+++ b/src/mainboard/lenovo/t400/romstage.c
@@ -35,6 +35,9 @@
 #define LPC_DEV PCI_DEV(0, 0x1f, 0)
 #define MCH_DEV PCI_DEV(0, 0, 0)
 
+#define HYBRID_GRAPHICS_INT_CLAIM_VGA 0x2
+#define HYBRID_GRAPHICS_SEC_VGA_EN 0x2
+
 static void early_lpc_setup(void)
 {
 	/* Set up SuperIO LPC forwards */
@@ -156,6 +159,15 @@ void mainboard_romstage_entry(unsigned long bist)
 	outl(inl(DEFAULT_GPIOBASE + 0x38) & ~0x400, DEFAULT_GPIOBASE + 0x38);
 
 	cbmem_initted = !cbmem_recovery(s3resume);
+
+	/* Enable dGPU. this is required for the Lenovo hybrid driver */
+	reg16 = pci_read_config16(MCH_DEV, D0F0_GGC);
+	pci_write_config16(MCH_DEV, D0F0_GGC,
+			   reg16 | HYBRID_GRAPHICS_INT_CLAIM_VGA);
+	reg16 = pci_read_config16(MCH_DEV, D0F0_DEVEN);
+	pci_write_config16(MCH_DEV, D0F0_DEVEN,
+			   reg16 | HYBRID_GRAPHICS_SEC_VGA_EN);
+
 #if CONFIG_HAVE_ACPI_RESUME
 	/* If there is no high memory area, we didn't boot before, so
 	 * this is not a resume. In that case we just create the cbmem toc.
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index a89f9bb..18c770c 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -540,6 +540,18 @@ static struct pci_operations gma_pci_ops = {
 	.set_subsystem = gma_set_subsystem,
 };
 
+static void gma_func0_disable(struct device *dev)
+{
+	u16 reg16;
+	device_t dev_host = dev_find_slot(0, PCI_DEVFN(0, 0));
+
+	reg16 = pci_read_config16(dev_host, D0F0_GGC);
+	reg16 |= (1 << 1); /* disable VGA decode */
+	pci_write_config16(dev_host, D0F0_GGC, reg16);
+
+	dev->enabled = 0;
+}
+
 static struct device_operations gma_func0_ops = {
 	.read_resources = pci_dev_read_resources,
 	.set_resources = pci_dev_set_resources,
@@ -548,6 +560,7 @@ static struct device_operations gma_func0_ops = {
 	.init = gma_func0_init,
 	.scan_bus = 0,
 	.enable = 0,
+	.disable = gma_func0_disable,
 	.ops_pci = &gma_pci_ops,
 };
 



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