[coreboot-gerrit] Patch set updated for coreboot: cpu/x86: Move fls() and fms() to mtrr.h

[Naresh Solanki (naresh.solanki@intel.com)]

Naresh Solanki (naresh.solanki at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16525

-gerrit

commit 50890eb11c94c522c895edf4595b74a151ba128f
Author: Rizwan Qureshi <rizwan.qureshi at intel.com>
Date:   Wed Sep 7 20:11:11 2016 +0530

    cpu/x86: Move fls() and fms() to mtrr.h
    
    Move the funtion to find most significant bit set(fms)
    and function to find least significant bit set(fls) to a common
    place. And remove the duplicates.
    
    Change-Id: Ia821038b622d93e7f719c18e5ee3e8112de66a53
    Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
---
 src/cpu/x86/mtrr/mtrr.c                   | 24 ------------------------
 src/include/cpu/x86/mtrr.h                | 27 +++++++++++++++++++++++++++
 src/northbridge/amd/amdk8/raminit_f_dqs.c | 26 +-------------------------
 3 files changed, 28 insertions(+), 49 deletions(-)

diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index 8bdc511..8033e79 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -92,30 +92,6 @@ static void enable_var_mtrr(unsigned char deftype)
 	wrmsr(MTRR_DEF_TYPE_MSR, msr);
 }
 
-/* fms: find most significant bit set, stolen from Linux Kernel Source. */
-static inline unsigned int fms(unsigned int x)
-{
-	int r;
-
-	__asm__("bsrl %1,%0\n\t"
-	        "jnz 1f\n\t"
-	        "movl $0,%0\n"
-	        "1:" : "=r" (r) : "g" (x));
-	return r;
-}
-
-/* fls: find least significant bit set */
-static inline unsigned int fls(unsigned int x)
-{
-	int r;
-
-	__asm__("bsfl %1,%0\n\t"
-	        "jnz 1f\n\t"
-	        "movl $32,%0\n"
-	        "1:" : "=r" (r) : "g" (x));
-	return r;
-}
-
 #define MTRR_VERBOSE_LEVEL BIOS_NEVER
 
 /* MTRRs are at a 4KiB granularity. Therefore all address calculations can
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h
index f32bece..79f9890 100644
--- a/src/include/cpu/x86/mtrr.h
+++ b/src/include/cpu/x86/mtrr.h
@@ -84,6 +84,33 @@ void set_var_mtrr(unsigned reg, unsigned base, unsigned size, unsigned type);
 int get_free_var_mtrr(void);
 #endif
 
+#if !defined(__ASSEMBLER__) && !defined(__ROMCC__)
+
+/* fms: find most significant bit set, stolen from Linux Kernel Source. */
+static inline unsigned int fms(unsigned int x)
+{
+	int r;
+
+	__asm__("bsrl %1,%0\n\t"
+	        "jnz 1f\n\t"
+	        "movl $0,%0\n"
+	        "1:" : "=r" (r) : "g" (x));
+	return r;
+}
+
+/* fls: find least significant bit set */
+static inline unsigned int fls(unsigned int x)
+{
+	int r;
+
+	__asm__("bsfl %1,%0\n\t"
+	        "jnz 1f\n\t"
+	        "movl $32,%0\n"
+	        "1:" : "=r" (r) : "g" (x));
+	return r;
+}
+#endif
+
 /* Align up to next power of 2, suitable for ROMCC and assembler too.
  * Range of result 256kB to 128MB is good enough here.
  */
diff --git a/src/northbridge/amd/amdk8/raminit_f_dqs.c b/src/northbridge/amd/amdk8/raminit_f_dqs.c
index 567a8b6..bce4ca6 100644
--- a/src/northbridge/amd/amdk8/raminit_f_dqs.c
+++ b/src/northbridge/amd/amdk8/raminit_f_dqs.c
@@ -16,6 +16,7 @@
 
 #include <arch/stages.h>
 #include <cpu/x86/cr.h>
+#include <cpu/x86/mtrr.h>
 
 //0: mean no debug info
 #define DQS_TRAIN_DEBUG 0
@@ -1640,31 +1641,6 @@ static void set_var_mtrr_dqs(
 	}
 }
 
-
-/* fms: find most significant bit set, stolen from Linux Kernel Source. */
-static inline unsigned int fms(unsigned int x)
-{
-	int r;
-
-	__asm__("bsrl %1,%0\n\t"
-		"jnz 1f\n\t"
-		"movl $0,%0\n"
-		"1:" : "=r" (r) : "g" (x));
-	return r;
-}
-
-/* fls: find least significant bit set */
-static inline unsigned int fls(unsigned int x)
-{
-	int r;
-
-	__asm__("bsfl %1,%0\n\t"
-		"jnz 1f\n\t"
-		"movl $32,%0\n"
-		"1:" : "=r" (r) : "g" (x));
-	return r;
-}
-
 static unsigned int range_to_mtrr(unsigned int reg,
 	unsigned long range_startk, unsigned long range_sizek,
 	unsigned long next_range_startk, unsigned char type, unsigned address_bits)