[coreboot-gerrit] Patch set updated for coreboot: Added config option for Pch-H support

[Boon Tiong Teo (boon.tiong.teo@intel.com)]

Boon Tiong Teo (boon.tiong.teo at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16520

-gerrit

commit 7f2013591e82f83ff8ecd105ad801dd517cdef66
Author: Teo Boon Tiong <boon.tiong.teo at intel.com>
Date:   Tue Sep 6 12:54:41 2016 +0800

    Added config option for Pch-H support
    
    Change-Id: I952ab0372afddd8dd434dc9667a5345d2ae9e108
    Signed-off-by: Teo Boon Tiong <boon.tiong.teo at intel.com>
---
 src/mainboard/intel/sklsdlbrk/Kconfig | 12 ++----------
 src/soc/intel/skylake/Kconfig         |  5 +++++
 2 files changed, 7 insertions(+), 10 deletions(-)

diff --git a/src/mainboard/intel/sklsdlbrk/Kconfig b/src/mainboard/intel/sklsdlbrk/Kconfig
index 5f8537c..656d165 100644
--- a/src/mainboard/intel/sklsdlbrk/Kconfig
+++ b/src/mainboard/intel/sklsdlbrk/Kconfig
@@ -2,24 +2,16 @@ if BOARD_INTEL_SKLSDLBRK
 
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
-	select BOARD_ROMSIZE_KB_16384
-#	select CACHE_ROM
-#	select CHROMEOS
-#	select CHROMEOS_RAMOOPS_DYNAMIC
-#	select CHROMEOS_VBNV_CMOS
+	select BOARD_ROMSIZE_KB_4096
 	select HAVE_ACPI_RESUME
 	select HAVE_ACPI_TABLES
 	select HAVE_OPTION_TABLE
 	select HAVE_SMI_HANDLER
-#	select MAINBOARD_HAS_CHROMEOS
-#	select MARK_GRAPHICS_MEM_WRCOMB
 	select MMCONF_SUPPORT
 	select MONOTONIC_TIMER_MSR
 	select PCIEXP_L1_SUB_STATE
 	select SOC_INTEL_SKYLAKE
-#	select VBOOT_DYNAMIC_WORK_BUFFER
-#	select VIRTUAL_DEV_SWITCH
-#	select LID_SWITCH
+	select SKYLAKE_SOC_PCH_H
 	select SUPERIO_NUVOTON_NCT6776
 	select SUPERIO_NUVOTON_NCT6776_COM_A
 	select CONSOLE_SERIAL
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index edf5db3..7f8e85f 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -169,6 +169,11 @@ config UART_DEBUG
 	select DRIVERS_UART_8250MEM_32
 	select NO_UART_ON_SUPERIO
 
+config SKYLAKE_SOC_PCH_H
+	bool
+	help
+	  Choose this option if you have a PCH-H chipset.
+
 config CHIPSET_BOOTBLOCK_INCLUDE
 	string
 	default "soc/intel/skylake/bootblock/timestamp.inc"