[coreboot-gerrit] New patch to review for coreboot: southbridge/amd/sr5650/sr5650.c: Update acpi_fill_ivrs

[Martin Roth (martinroth@google.com)]

Martin Roth (martinroth at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16568

-gerrit

commit 1fd757dbdb9ac9afdc7b69ee7e93f1439620fa2a
Author: Martin Roth <martinroth at google.com>
Date:   Fri Sep 9 20:52:58 2016 -0600

    southbridge/amd/sr5650/sr5650.c: Update acpi_fill_ivrs
    
    - Update lines to make them shorter than 80 chaacters
    - Update using #defines from acpi_ivrs.h
    
    Change-Id: I1bf6cdac00e28f5b0969fd8f98e37c66f8e43110
    Signed-off-by: Martin Roth <martinroth at google.com>
---
 src/southbridge/amd/sr5650/sr5650.c | 58 ++++++++++++++++++++++---------------
 1 file changed, 35 insertions(+), 23 deletions(-)

diff --git a/src/southbridge/amd/sr5650/sr5650.c b/src/southbridge/amd/sr5650/sr5650.c
index d382c4e..47de24c 100644
--- a/src/southbridge/amd/sr5650/sr5650.c
+++ b/src/southbridge/amd/sr5650/sr5650.c
@@ -825,50 +825,62 @@ static unsigned long acpi_fill_ivrs(acpi_ivrs_t* ivrs, unsigned long current)
 
 	device_t nb_dev = dev_find_slot(0, PCI_DEVFN(0, 0));
 	if (!nb_dev) {
-		printk(BIOS_WARNING, "acpi_fill_ivrs: Unable to locate SR5650 device!  IVRS table not generated...\n");
+		printk(BIOS_WARNING, "acpi_fill_ivrs: Unable to locate SR5650 "
+				"device!  IVRS table not generated...\n");
 		return (unsigned long)ivrs;
 	}
 
 	device_t iommu_dev = dev_find_slot(0, PCI_DEVFN(0, 2));
 	if (!iommu_dev) {
-		printk(BIOS_WARNING, "acpi_fill_ivrs: Unable to locate SR5650 IOMMU device!  IVRS table not generated...\n");
+		printk(BIOS_WARNING, "acpi_fill_ivrs: Unable to locate SR5650 "
+				"IOMMU device!  IVRS table not generated...\n");
 		return (unsigned long)ivrs;
 	}
 
-	ivrs->iv_info = 0x0;
-	ivrs->iv_info |= (0x40 << 15);	/* Maximum supported virtual address size */
-	ivrs->iv_info |= (0x34 << 8);	/* Maximum supported physical address size */
+	ivrs->iv_info = IVINFO_VA_SIZE_64_BITS | IVINFO_PA_SIZE_52_BITS;
+
+	ivrs->ivhd.type = IVHD_BLOCK_TYPE_LEGACY__FIXED;
+	ivrs->ivhd.flags = IVHD_FLAG_ISOC |
+			   IVHD_FLAG_RES_PASS_PW |
+			   IVHD_FLAG_PASS_PW |
+			   IVHD_FLAG_IOTLB_SUP;
 
-	ivrs->ivhd.type = 0x10;
-	ivrs->ivhd.flags = 0x0e;
-	// if (get_nb_rev(nb_dev) != REV_SR5650_A11) {
-		ivrs->ivhd.flags |= 0x10;				/* Enable ATS support on all revisions except A11 */
-	// }
 	ivrs->ivhd.length = sizeof(struct acpi_ivrs_ivhd);
-	ivrs->ivhd.device_id = 0x2 | (nb_dev->bus->secondary << 8);	/* BDF <bus>:00.2 */
-	ivrs->ivhd.capability_offset = 0x40;				/* Capability block 0x40 (type 0xf, "Secure device") */
-	ivrs->ivhd.iommu_base_low = pci_read_config32(iommu_dev, 0x44) & 0xffffc000;
+
+	/* BDF <bus>:00.2 */
+	ivrs->ivhd.device_id = 0x2 | (nb_dev->bus->secondary << 8);
+
+	/* Capability block 0x40 (type 0xf, "Secure device") */
+	ivrs->ivhd.capability_offset = 0x40;
+	ivrs->ivhd.iommu_base_low = pci_read_config32(iommu_dev, 0x44) &
+			0xffffc000;
 	ivrs->ivhd.iommu_base_high = pci_read_config32(iommu_dev, 0x48);
 	ivrs->ivhd.pci_segment_group = 0x0;
 	ivrs->ivhd.iommu_info = 0x0;
-	ivrs->ivhd.iommu_info |= (0x14 << 8);
+	ivrs->ivhd.iommu_info |= (0x14 << IOMMU_INFO_UNIT_ID_SHIFT);
 	ivrs->ivhd.iommu_feature_info = 0x0;
 
 	/* Describe HPET */
 	p = (uint8_t *)current;
-	p[0] = 0x48;			/* Entry type */
-	p[1] = 0;			/* Device */
-	p[2] = 0;			/* Bus */
-	p[3] = 0xd7;			/* Data */
-	p[4] = 0x0;			/* HPET number */
-	p[5] = 0x14 << 3;		/* HPET device */
-	p[6] = nb_dev->bus->secondary;	/* HPET bus */
-	p[7] = 0x2;			/* Variety */
+	p[0] = IVHD_DEV_8_BYTE_EXT_SPECIAL_DEV;	/* Entry type */
+	p[1] = 0;				/* Device */
+	p[2] = 0;				/* Bus */
+	p[3] = IVHD_DTE_LINT_1_PASS |		/* DTE */
+	       IVHD_DTE_LINT_0_PASS |
+	       IVHD_DTE_SYS_MGT_INTX_NO_TRANS |
+	       IVHD_DTE_NMI_PASS |
+	       IVHD_DTE_EXT_INT_PASS |
+	       IVHD_DTE_INIT_PASS;
+	p[4] = 0x0;				/* HPET number */
+	p[5] = 0x14 << 3;			/* HPET device */
+	p[6] = nb_dev->bus->secondary;		/* HPET bus */
+	p[7] = IVHD_SPECIAL_DEV_HPET;		/* Variety */
 	ivrs->ivhd.length += 8;
 	current += 8;
 
 	/* Describe PCI devices */
-	add_ivrs_device_entries(NULL, all_devices, 0, -1, NULL, &current, &ivrs->ivhd.length);
+	add_ivrs_device_entries(NULL, all_devices, 0, -1, NULL, &current,
+			&ivrs->ivhd.length);
 
 	/* Describe IOAPICs */
 	unsigned long prev_current = current;