[coreboot-gerrit] Patch set updated for coreboot: mainboard/intel/amenia: Configure PERST_0 pin

[Vaibhav Shankar (vaibhav.shankar@intel.com)]

Vaibhav Shankar (vaibhav.shankar at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16350

-gerrit

commit 4ed261c8c4bb8f1778ae8c147f55b6ffebbe537f
Author: Vaibhav Shankar <vaibhav.shankar at intel.com>
Date:   Fri Aug 26 19:10:21 2016 -0700

    mainboard/intel/amenia: Configure PERST_0 pin
    
    Configure PERST_0 and assign the pin in devicetree.
    
    BUG=chrome-os-partner:55877
    TEST=Suspend and resume using 'echo freeze > /sys/power/state'.
    System should resume with PCIE and wifi functional.
    
    Change-Id: I39b4d8bba92f352ae121c7552f58480295b48aef
    Signed-off-by: Vaibhav Shankar <vaibhav.shankar at intel.com>
---
 src/mainboard/intel/amenia/devicetree.cb | 5 +++++
 src/mainboard/intel/amenia/gpio.h        | 2 +-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/intel/amenia/devicetree.cb b/src/mainboard/intel/amenia/devicetree.cb
index 0e47d2e..351aa5a 100644
--- a/src/mainboard/intel/amenia/devicetree.cb
+++ b/src/mainboard/intel/amenia/devicetree.cb
@@ -7,6 +7,11 @@ chip soc/intel/apollolake
 	register "pcie_rp0_clkreq_pin" = "3"    # wifi/bt
 	register "pcie_rp2_clkreq_pin" = "0"    # SSD
 
+	# GPIO for PERST_0
+	# If PERST_0 is defined assign the GPIO
+	# If PERST_0 is not defined assign GPIO_PRT0_UDEF
+	register "prt0_gpio" = "GPIO_122"
+
 	# eMMC TX DATA Delay 1#
 	# 0x1A[14:8] stands for 26*125 = 3250 pSec delay for HS400
 	# 0x1A[6:0] stands for 26*125 = 3250 pSec delay for SDR104/HS200
diff --git a/src/mainboard/intel/amenia/gpio.h b/src/mainboard/intel/amenia/gpio.h
index 4a4d08f..3eb4103 100644
--- a/src/mainboard/intel/amenia/gpio.h
+++ b/src/mainboard/intel/amenia/gpio.h
@@ -223,7 +223,7 @@ static const struct pad_config gpio_table[] = {
 	PAD_NC(GPIO_119, DN_20K), /* GP_SSP_2_FS0 */
 	PAD_NC(GPIO_120, DN_20K), /* GP_SSP_2_FS1 */
 	PAD_NC(GPIO_121, DN_20K), /* GP_SSP_2_FS2 */
-	PAD_NC(GPIO_122, DN_20K), /* GP_SSP_2_RXD */
+	PAD_CFG_GPO(GPIO_122, 0, DEEP), /* WIFI PERST_0 */
 	PAD_NC(GPIO_123, DN_20K), /* GP_SSP_2_TXD */
 	/** end of North West Community */
 	/** North Community */