[coreboot-gerrit] Patch merged into coreboot/master: drivers/i2c/tpm: Clean up handling of command ready

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit fbce31a2cc560a316ed6aadac3e8e5c95a095178
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Mon Sep 12 11:26:45 2016 -0700

    drivers/i2c/tpm: Clean up handling of command ready
    
    The TPM driver was largely ignoring the meaning of the command
    ready bit in the status register, instead just arbitrarily
    sending it at the end of every receive transaction.
    
    Instead of doing this have the command ready bit be set at the
    start of a transaction, and only clear it at the end of a
    transaction if it is still set, in case of failure.
    
    Also the cr50 function to wait for status and burst count was
    not waiting the full 2s that the existing driver does so that
    value is increased.  Also, during the probe routine a delay is
    inserted after each status register read to ensure the TPM has
    time to actually start up.
    
    Change-Id: I1c66ea9849e6be537c7be06d57258f27c563c1c2
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: https://review.coreboot.org/16591
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-by: Philipp Deppenwiese <zaolin.daisuki at googlemail.com>


See https://review.coreboot.org/16591 for details.

-gerrit