[coreboot-gerrit] Patch set updated for coreboot: mainboard/google/reef: Configure WLAN as wake source

Vaibhav Shankar (vaibhav.shankar@intel.com) gerrit at coreboot.org
Fri Sep 16 23:47:03 CEST 2016


Vaibhav Shankar (vaibhav.shankar at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16611

-gerrit

commit 46ec103254b2fd98746fd645a47c9e6776d3353d
Author: Vaibhav Shankar <vaibhav.shankar at intel.com>
Date:   Thu Sep 15 14:02:54 2016 -0700

    mainboard/google/reef: Configure WLAN as wake source
    
    This implements PRW method for WLAN and configures PCIe wake pin to
    generate SCI.
    
    BUG=chrome-os-partner:56483
    TEST=Suspend the system into S3 or S0ix. System should resume through wake
    event from wifi.
    
    Change-Id: I9bd078c2de19ebcc652b5d981997d2a5b5f0b1b7
    Signed-off-by: Vaibhav Shankar <vaibhav.shankar at intel.com>
---
 src/mainboard/google/reef/variants/baseboard/devicetree.cb | 7 ++++++-
 src/mainboard/google/reef/variants/baseboard/gpio.c        | 2 +-
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
index c83df61..f1ce8c5 100644
--- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
@@ -94,7 +94,12 @@ chip soc/intel/apollolake
 		device pci 13.1 off end	# - Root Port 3 - PCIe-A 1
 		device pci 13.2 off end	# - Root Port 4 - PCIe-A 2
 		device pci 13.3 off end	# - Root Port 5 - PCIe-A 3
-		device pci 14.0 on  end	# - Root Port 0 - PCIe-B 0 - Wifi
+		device pci 14.0 on
+			chip drivers/intel/wifi
+				register "wake" = "GPE0_DW3_00"
+				device pci 00.0 on end
+			end
+		end	# - Root Port 0 - PCIe-B 0 - Wifi
 		device pci 14.1 off end	# - Root Port 1 - PCIe-B 1
 		device pci 15.0 on  end	# - XHCI
 		device pci 15.1 off end # - XDCI
diff --git a/src/mainboard/google/reef/variants/baseboard/gpio.c b/src/mainboard/google/reef/variants/baseboard/gpio.c
index eb1b2eb..7d74140c 100644
--- a/src/mainboard/google/reef/variants/baseboard/gpio.c
+++ b/src/mainboard/google/reef/variants/baseboard/gpio.c
@@ -24,7 +24,7 @@
  */
 static const struct pad_config gpio_table[] = {
 	/* PCIE_WAKE[0:3]_N */
-	PAD_CFG_NF(GPIO_205, UP_20K, DEEP, NF1), /* WLAN */
+	PAD_CFG_GPI_SCI_LOW(GPIO_205, UP_20K, DEEP, EDGE_SINGLE), /* WLAN */
 	PAD_CFG_GPI(GPIO_206, UP_20K, DEEP),	 /* Unused */
 	PAD_CFG_GPI(GPIO_207, UP_20K, DEEP),	 /* Unused */
 	PAD_CFG_GPI(GPIO_208, UP_20K, DEEP),	 /* Unused */



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