[coreboot-gerrit] Patch merged into coreboot/master: mainboard/google/reef: Enable cr50 TPM interrupt

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 401bd31b2d9efed119d82eb4c153bd273fe64b49
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Mon Sep 19 17:24:55 2016 -0700

    mainboard/google/reef: Enable cr50 TPM interrupt
    
    Enable the cr50 TPM and interrupt as GPE0_DW1_28 for use during
    verstage.  The interrupt is left in APIC mode as the GPE is
    still latched when the GPIO is pulled low.
    
    BUG=chrome-os-partner:53336
    
    Change-Id: Ib0247653bdcbaccb645cd16b81d7ec3c38f669af
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: https://review.coreboot.org/16673
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See https://review.coreboot.org/16673 for details.

-gerrit