[coreboot-gerrit] Patch merged into coreboot/master: nb/x4x/raminit: Fix programming dram timings
gerrit at coreboot.org
gerrit at coreboot.org
Sun Jan 22 20:23:19 CET 2017
the following patch was just integrated into master:
commit eee4f6b224b897184327539fcbeb23f9b26f02d9
Author: Arthur Heymans <arthur at aheymans.xyz>
Date: Tue Jan 3 00:49:45 2017 +0100
nb/x4x/raminit: Fix programming dram timings
The results were obtained by comparing the MCHBAR registers of vendor bios
with coreboot at the same dram timings.
This fixes 2 issues:
* 1333MHz fsb CPUs were limited to 667MHz ddr2 speeds, because with
800MHz raminit failed;
* 1067MHz fsb CPUs did not boot when second dimm slot was populated.
TESTED on ga-g41m-es2l on 800, 1067 and 1333MHz CPUs with
DDR2 667 and 800MHz dimms.
Change-Id: I70f554f97b44947c2c78713b4d73a47c06d7ba60
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18022
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h at gmx.de>
See https://review.coreboot.org/18022 for details.
-gerrit
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