[coreboot-gerrit] Patch set updated for coreboot: amd/pi/stoney: Simplify UMA calculations
Marshall Dawson (marshalldawson3rd@gmail.com)
gerrit at coreboot.org
Fri Mar 3 00:05:38 CET 2017
Marshall Dawson (marshalldawson3rd at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18430
-gerrit
commit d614d5aafb8b08688cd473c93cfca968e6e202f2
Author: Marshall Dawson <marshalldawson3rd at gmail.com>
Date: Tue Jan 17 18:27:18 2017 -0500
amd/pi/stoney: Simplify UMA calculations
Use the new top of memory functions to ease the UMA base and size.
Original-Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
Original-Reviewed-by: Marc Jones <marcj303 at gmail.com>
(cherry picked from commit 781b329effc5242c05991aea438c3e2c80244b0f)
Change-Id: Ic83fa766dc4aa912612f0073b7027bf868d2d989
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
src/northbridge/amd/pi/00670F00/northbridge.c | 43 +++++----------------------
1 file changed, 7 insertions(+), 36 deletions(-)
diff --git a/src/northbridge/amd/pi/00670F00/northbridge.c b/src/northbridge/amd/pi/00670F00/northbridge.c
index c21d030..69478d6 100644
--- a/src/northbridge/amd/pi/00670F00/northbridge.c
+++ b/src/northbridge/amd/pi/00670F00/northbridge.c
@@ -37,6 +37,7 @@
#include <northbridge/amd/pi/agesawrapper.h>
#include <northbridge/amd/pi/agesawrapper_call.h>
#include "northbridge.h"
+#include "memmap.h"
#include <cpu/x86/lapic.h>
#include <cpu/amd/mtrr.h>
@@ -696,50 +697,17 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
}
#endif
-#define ONE_MB_SHIFT 20
-#define ONE_GB_SHIFT 30
-
static void setup_uma_memory(void)
{
#if CONFIG_GFXUMA
- uint64_t topmem = bsp_topmem();
- uint64_t topmem2 = bsp_topmem2();
- uint32_t sysmem_mb, sysmem_gb;
-
- /* refer to UMA_AUTO size computation in Family15h BKDG. */
- /* Please reference MemNGetUmaSizeML() */
- /*
- * Total system memory UMASize
- * >= 6G 1024M
- * >= 4G 512M
- * >= 2G 256M
- * < 2G 128M
- */
-
- sysmem_mb = (topmem + (16ull << ONE_MB_SHIFT)) >> ONE_MB_SHIFT; // Ignore 16MB allocated for C6 when finding UMA size
- sysmem_mb += topmem2 ? ((topmem2 >> ONE_MB_SHIFT) - 4096) : 0;
- sysmem_gb = sysmem_mb >> (ONE_GB_SHIFT - ONE_MB_SHIFT);
- printk(BIOS_SPEW, "%s: system memory size %luGB, topmem2 size %lluMB, topmem size %lluMB\n",
- __func__, (unsigned long)sysmem_gb, (topmem2 >> ONE_MB_SHIFT), (topmem >> ONE_MB_SHIFT));
- if (sysmem_gb >= 6) {
- uma_memory_size = 1024 << ONE_MB_SHIFT;
- } else if (sysmem_gb >= 4) {
- uma_memory_size = 512 << ONE_MB_SHIFT;
- } else if (sysmem_gb >= 2) {
- uma_memory_size = 256 << ONE_MB_SHIFT;
- } else {
- uma_memory_size = 128 << ONE_MB_SHIFT;
- }
- uma_memory_base = topmem - uma_memory_size; /* TOP_MEM1 */
+ uma_memory_size = uma_size_auto();
+ uma_memory_base = uma_base_auto();
printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
__func__, uma_memory_size, uma_memory_base);
-
- /* TODO: TOP_MEM2 */
#endif
}
-
static void domain_set_resources(device_t dev)
{
unsigned long mmio_basek;
@@ -751,7 +719,6 @@ static void domain_set_resources(device_t dev)
struct hw_mem_hole_info mem_hole;
u32 reset_memhole = 1;
#endif
-
pci_tolm = 0xffffffffUL;
for (link = dev->link_list; link; link = link->next) {
pci_tolm = find_pci_tolm(link);
@@ -838,12 +805,16 @@ static void domain_set_resources(device_t dev)
ramtop = limitk * 1024;
}
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
#if CONFIG_GFXUMA
set_top_of_ram(uma_memory_base);
uma_resource(dev, 7, uma_memory_base >> 10, uma_memory_size >> 10);
#else
set_top_of_ram(ramtop);
#endif
+#else /* IS_ENABLED(CONFIG_LATE_CBMEM_INIT) */
+ uma_resource(dev, 7, uma_memory_base >> 10, uma_memory_size >> 10);
+#endif
for (link = dev->link_list; link; link = link->next) {
if (link->children) {
More information about the coreboot-gerrit
mailing list