[coreboot-gerrit] Patch set updated for coreboot: amd/pi/stoney: Change to early cbmem init
Marc Jones (marc@marcjonesconsulting.com)
gerrit at coreboot.org
Sun Mar 12 22:00:21 CET 2017
Marc Jones (marc at marcjonesconsulting.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18433
-gerrit
commit 100f13e034c85cdc454c44acbe69e4b857e2d194
Author: Marshall Dawson <marshalldawson3rd at gmail.com>
Date: Sun Jan 29 18:27:02 2017 -0700
amd/pi/stoney: Change to early cbmem init
Remove the flexibility of using early or late cbmem init. Use early
100% of the time.
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
Reviewed-by: Marc Jones <marcj303 at gmail.com>
(cherry picked from commit 4c1b4615516dfbd46a768968c2be017cdeb51ee4)
Change-Id: Id1c22a15752a07eebf39530ba8549ef1f74265ec
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
src/cpu/amd/pi/00670F00/romstage.c | 3 +++
src/northbridge/amd/pi/00670F00/Kconfig | 2 +-
src/northbridge/amd/pi/00670F00/memmap.c | 13 -------------
src/northbridge/amd/pi/00670F00/northbridge.c | 9 ---------
4 files changed, 4 insertions(+), 23 deletions(-)
diff --git a/src/cpu/amd/pi/00670F00/romstage.c b/src/cpu/amd/pi/00670F00/romstage.c
index c644f03..6876e17 100644
--- a/src/cpu/amd/pi/00670F00/romstage.c
+++ b/src/cpu/amd/pi/00670F00/romstage.c
@@ -53,6 +53,9 @@ void romstage_common(void)
AGESAWRAPPER(amdinitpost);
post_code(0x41);
+ cbmem_initialize_empty();
+
+ post_code(0x42);
AGESAWRAPPER(amdinitenv);
/* TODO: Move to generic romstage hudson code.
diff --git a/src/northbridge/amd/pi/00670F00/Kconfig b/src/northbridge/amd/pi/00670F00/Kconfig
index c8ce668..b47a3e6 100644
--- a/src/northbridge/amd/pi/00670F00/Kconfig
+++ b/src/northbridge/amd/pi/00670F00/Kconfig
@@ -14,7 +14,7 @@
##
config NORTHBRIDGE_AMD_PI_00670F00
bool
- select LATE_CBMEM_INIT
+ select EARLY_CBMEM_INIT
if NORTHBRIDGE_AMD_PI_00670F00
diff --git a/src/northbridge/amd/pi/00670F00/memmap.c b/src/northbridge/amd/pi/00670F00/memmap.c
index 02bfc13..982ea62 100644
--- a/src/northbridge/amd/pi/00670F00/memmap.c
+++ b/src/northbridge/amd/pi/00670F00/memmap.c
@@ -82,20 +82,7 @@ uint32_t uma_base_auto(void)
return (uint32_t)topmem - uma_size_auto();
}
-#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
-unsigned long get_top_of_ram(void)
-{
- AMD_CONFIG_PARAMS StdHeader;
- UINT64 MsrReg;
-
- LibAmdMsrRead (0xC001001A, &MsrReg, &StdHeader);
- return (unsigned long)MsrReg;
-}
-#endif
-
-#if !IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
void *cbmem_top(void)
{
return (void *)uma_base_auto();
}
-#endif
diff --git a/src/northbridge/amd/pi/00670F00/northbridge.c b/src/northbridge/amd/pi/00670F00/northbridge.c
index 69478d6..e1b3862 100644
--- a/src/northbridge/amd/pi/00670F00/northbridge.c
+++ b/src/northbridge/amd/pi/00670F00/northbridge.c
@@ -805,16 +805,7 @@ static void domain_set_resources(device_t dev)
ramtop = limitk * 1024;
}
-#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
-#if CONFIG_GFXUMA
- set_top_of_ram(uma_memory_base);
uma_resource(dev, 7, uma_memory_base >> 10, uma_memory_size >> 10);
-#else
- set_top_of_ram(ramtop);
-#endif
-#else /* IS_ENABLED(CONFIG_LATE_CBMEM_INIT) */
- uma_resource(dev, 7, uma_memory_base >> 10, uma_memory_size >> 10);
-#endif
for (link = dev->link_list; link; link = link->next) {
if (link->children) {
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