[coreboot-gerrit] New patch to review for coreboot: ramstage: Align stack to 16 bytes
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Wed Mar 15 07:48:05 CET 2017
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18823
-gerrit
commit 7a8a09a41abd53cca83f776d716bc171fc3d2303
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Wed Mar 15 08:07:22 2017 +0200
ramstage: Align stack to 16 bytes
Some SSE instructions could take 128bit memory operands from
stack.
AGESA vendorcode was always built with SSE enabled, but until
now stack alignment was not known to cause major issues. Seems
like GCC-6.3 more likely emits instructions that depend on the
16 byte alignment of stack.
Change-Id: Iea3de54f20ff242105bce5a5edbbd76b04c0116c
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/arch/x86/c_start.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/arch/x86/c_start.S b/src/arch/x86/c_start.S
index 9a64fa6..7a03ca6 100644
--- a/src/arch/x86/c_start.S
+++ b/src/arch/x86/c_start.S
@@ -110,6 +110,8 @@ _start:
*/
post_code(POST_PRE_HARDWAREMAIN) /* post fe */
+ andl $0xFFFFFFF0, %esp
+
#if CONFIG_GDB_WAIT
call gdb_hw_init
call gdb_stub_breakpoint
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