[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Use C entry code for MTRR programming
Subrata Banik (Code Review)
gerrit at coreboot.org
Thu Mar 23 06:59:00 CET 2017
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/18923 )
Change subject: soc/intel/skylake: Use C entry code for MTRR programming
......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/#/c/18923/5/src/soc/intel/skylake/bootblock/cpu.c
File src/soc/intel/skylake/bootblock/cpu.c:
PS5, Line 119: get_bios_size();
> You could just do the following:
Done
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Gerrit-MessageType: comment
Gerrit-Change-Id: I87a5c655da8ff5f6d8ef86907b7ae2263239b1ac
Gerrit-PatchSet: 5
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins)
Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma at intel.com>
Gerrit-HasComments: Yes
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