Order of Execution

ollie lho ollie at sis.com.tw
Thu Dec 12 22:29:00 CET 2002


On Fri, 2002-12-13 at 00:37, Nathanael Noblet wrote:
> Hello,
> 	My attempt at a sis530 port seems to be coming along. I am almost 
> ready to compile and try this thing. I am though confused or unclear as 
> to the order that stuff needs to happen. I assume that eventually I 
> initialize RAM and then superIO and all that, what I don't understand 
> is the basic order of execution, this happens and then this needs to 
> and then this ... etc. I have been using as a guide the sis540 chipset 
> and stuff like that to get my configuration files together and as 
> examples, but well since the code for stuff is spread accross trees, 
> what happens when I make one of these projects? Does it take the 
> mainboard.c file first, then the raminit? I'm not sure if I am being as 
> clear as possible, but if anyone has a clue what I'm asking about it 
> would help.
> 
> 	For example, the raminit and the chipset specific code is usually 
> assembly, whereas the mainboard.c is well, C. So where does that 
> raminit come into play, and how is it called, IS it called like a 
> function, same goes for the chipset initialization (I guess chip init 
> is tied pretty closely with the ram init stuff but well what happens in 
> what order is what I could use some pointers on....

The very first instructions are in ipl.S for SiS chipsets. These codes 
are used to initialize the DRAM and some other (highly) critical 
registers in north/south bridge. After the DRAM is up, ipl.S will load
and/or jump to the code in crt0.S. The raminit.inc and xxx_regs.inc
contains (middle) critical codes to stabilize the system which are 
included in the head of crt0.S and executed before the generic LinuxBIOS
code. The southbridge.c and southbridge.c are low priority and used 
mainly use to fix up some bug/configuration problem. Generally, the 
mainborad.c is empty and trivial unless your mainboard has some other
bugs to fix.

-- 
ollie lho <ollie at sis.com.tw>




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