more news on the smartcore P3 and etherboot failures.
stutts at innocon.com
Mon Sep 23 15:28:00 CEST 2002
On Mon, 2002-09-23 at 12:34, Ronald G Minnich wrote:
> So, back to the original issue: inw operations acting wrong. The first
> inw() always reads 0, the seconds reads what looks like the right value.
> Anybody have an idea on what kind of north/south configuration problems
> could make this happen?
Slow (bad) hardware? I've seen that happen on a PCI device at 80 deg. C,
and I've seen it happen on a device which could only speced up to 28MHz
More information about the coreboot