EPIA-M SPD progress

SONE Takeshi ts1 at tsn.or.jp
Sat Jul 19 13:51:59 CEST 2003


On Fri, Jul 18, 2003 at 11:42:12AM -0700, Dave Ashley wrote:
> Probe vs SPD discussion: I think the question is which produces a better
> result, regardless of complexity. Probing seems to have disadvantages in
> that it can't know how to set timing amounts, signal levels, or clock delays.

I know SPD is the right thing to do, and the complexity is the cost
we have to pay for that.

Current code for EPIA is just simple and stupid but works for
(almost) everyone.

Eric said romcc bloats the resulting code since it has to
inline all the function calls. I understand how hard doing
non-inline functions without RAM is but code bloat sounds
not very sexy to me.

I will look into it when I am ready and feel good enough
to learn how to read that yet another kind of hex dumps...


> It would only allow you to figure out the right column bit size I expect.

And the amount of RAM too of course. :)

> What disadvantages does SPD have other than it is more complex? Wouldn't it
> let you then be able to correctly use any DDR module you want?

I don't know about DDR, but for EPIA, which uses non-DDR SDRAM,
so far I haven't heard of a case where the current code fails.

On wrong SPD: I figured out why most BIOSes have the setup option
to force DRAM parameters other than "By SPD".
Do we need that feature too? :)

--
Takeshi



More information about the coreboot mailing list