AMD64 Solo Hang - news

[Stefan Reinauer]

Hi,

it seems that the Solo motherboard is the only motherboard tested so far
that is based on an Athlon64 instead of Opteron CPUs..

The following code in src/northbridge/amd/amdk8/misc_control.c relies on
more than one hypertransport link being available:

        cmd = pci_read_config32(dev, 0xdc);
        if((cmd & 0x0000ff00) != 0x02500) {
                cmd &= 0xffff00ff;
                cmd |= 0x00002500;
                pci_write_config32(dev, 0xdc, cmd );
                printk_debug("resetting cpu\n");
                hard_reset();
        }

This implicitly changes CPU0 Link1 FIFO Read Pointer Optimization, not
taking into regard that LDT1 might not be there.

It seems this code should rather check all links to see whether they are
connected and optimize _all_ of the connected.

Is the CPU reset here really needed for the setting to become active?
The BKDG does not state this explicitly ... (Therefore I vote for
removing it)

  Stefan

-- 
     Stefan Reinauer, SUSE LINUX AG
Teamleader Architecture Development