cpu/p6/mtrr.c

[Eric W. Biederman]

SONE Takeshi <ts1 at tsn.or.jp> writes:

> Eric,
> 
> Is the below change intended?

Yes.  But I put it in when Opteron was the only x86 cpu
in the tree and figured I would revisit later when we started
supporting other cpus.

> EPIA has problem with current CVS (resets when setting var mtrr),
> and it worked again when I reversed this change.
> According to the Intel System Programming Manual for PIII,
> bits 36-63 are reserved, and apparently C3 doesn't like it to be set.

Ok.  Then this needs to be fixed.  I am wondering how we code
this cleanly.

Eric