[COMMIT] Infrastructure Updates 4

Stefan Reinauer stepan at suse.de
Wed Sep 3 10:33:01 CEST 2003


> The way to look at the code is that:
> - device.c has the logic to enumerate and assign resources to devices and busses.
> - pci_device.c has the methods for doing that on pci devices.
> - hypertransport.c has the methods for doing that with hypertranport devices.
> - northbridge/amd/amdk8/northbridge.c has the drivers for the amdk8 specific
>   northbridge.
> 
> In short dynamic resource assignment should now be pretty simple and should
> remove the need for most of the hard codes. 
 
Ok, thanks for the clarification. 

The config file for the hdama looks like follows:
northbridge amd/amdk8 "mc0"
        pci 0:18.0
        pci 0:18.0
        pci 0:18.0
        pci 0:18.1
        pci 0:18.2
        pci 0:18.3
        southbridge amd/amd8131 "amd8131"
                pci 0:0.0
                pci 0:0.1
                pci 0:1.0
                pci 0:1.1
        end
        southbridge amd/amd8111 "amd8111"
                pci 0:0.0
                pci 0:1.0
                pci 0:1.1
                pci 0:1.2
                pci 0:1.3
                pci 0:1.5
                pci 0:1.6
                superio NSC/pc87360
                  [..]
                end
        end
end

northbridge amd/amdk8 "mc1"
        pci 0:19.0
        pci 0:19.0
        pci 0:19.0
        pci 0:19.1
        pci 0:19.2
        pci 0:19.3
end

cpu k8 "cpu0"
        register "up" = "{ .chip = &amd8131, .ht_width=16, .ht_speed=600 }"
end

cpu k8 "cpu1" 
end

What's the meaning of the "pci" command? why are some mentioned
multiple times? (0:18.0, 0:19.0)

I started digging through the code, but I am not completely there yet.
It seems to me it would make sense to move the register "up" information
from cpu k8 "cpu0" to the northbridge amd/amdk8 "mc0" definition since
its information associated with the used southbridges.

There is currently no information on how the amd8131 and 8151 are
actually linked. 

Does it look like this? :

   8111
     | 
   8131
     | 
   CPU0 -- CPU1

In this case it could be needed to describe to which link of the 8131
the 8111 is connected?! Would the link speed between 8131 and 8111 be
set correctly with the current code?

Same thing applies for the 8151 that is used in the tyan and solo
boards. The link speed is currently written by
src/southbridge/amd/amd8151/amd8151_agp3.c

If the code is already covered by the new ht code it could be removed
from the 8151 code. If this constellation is not possible,
amd8151_agp3.c should read the link values from static.c - What is the
better solution?

  Stefan


-- 
Architecture Team
    SuSE Linux AG



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