solo + SST49LF080A

Stefan Reinauer stepan at suse.de
Wed Sep 17 09:06:00 CEST 2003


* Ralf Große Börger <RGrosseBoerger at dspace.de> [030917 12:03]:
> I am seeing strange effects, if I am using LinuxBIOS in a SST49LF080A on a
> solo system. 
> The same LinuxBIOS image(256KB) works flawless with a SST49LF040 or the
> preinstalled Winbond chip, but it gets stuck somewhere in setup_resource_map
> with the SST49LF080A.
 
setup_resource_map is kind of sensitive. It does also hang when
LinuxBIOS is used without the failsafe mechanism.

This code from amd8111_enable_rom.c blends in the complete address space
at 4G-4MB

        /* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */
        /* Locate the amd8111 */
        addr = pci_locate_device(PCI_ID(0x1022, 0x7468), 0);

        /* Set the 4MB enable bit bit */
        byte = pci_read_config8(addr, 0x43);
        byte |= 0x80;
        pci_write_config8(addr, 0x43, byte);


> On the other hand, the preinstalled Pheonix BIOS boots from a SST49LF080A
> without a problem.
> 
> A quick look into the datasheets of both SST chips revealed a slight
> difference: The SST49LF080A decodes the bottom 128 KB memory access address
> (0x000FFFFF to 0x000E0000) only, whereas the SST49LF040 decodes the complete
> 512KB memory area (0x000FFFFF to 0x0007FFFF).
> Does this pose any problems for LinuxBIOS? 

I am not sure whether this causes the problem. The Datasheet says:

-----------------------
Device #0 - 3 
Memory Access   FFFF FFFFH : FFC0 0000H    4 MByte
Register Access FFBF FFFFH : FF80 0000H    4 MByte

For device #0 (Boot Device), SST49LF080A decodes the physical addresses
of the top 2 blocks (including Boot Block) both at system memory ranges 
FFFF FFFFH to FFFE 0000H and 000F FFFFH to 000E 0000H.
-----------------------

So it looks like only the 1MB-128k range is partly decoded, but the
upper range, which is used for the kernel, is fully visible

Does maybe the Solo motherboard lack some wires to physically see 
all of the chip?

> Or has anyone else made experiences with the SST49LF080A? 
> There has been a thread about sporadic problems, but I can reproduce this
> behaviour with several SST49LF080A and I'm quite sure the chip is flashed
> correctly.

The sporadic problems were mostly about writing the flash iirc.

Best regards,
  Stefan Reinauer
  
-- 
Architecture Team
    SuSE Linux AG



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