Build fixes....
Eric W. Biederman
ebiederman at lnxi.com
Thu Nov 4 04:53:01 CET 2004
I have been working on getting all of the working ports in
the tree to build. Of particular interest is that the mainboard/via/epia builds.
The exceptions are currently:
- i855pm as it's raminit.c is still 1/2 in assembly.
- The via epia-m as it's southbridge code needs to converted so it will run.
- The ppc ports as I am still building a cross compiler and have not had a chance
to test it yet.
- Whatever I fat fingered at the last minute before I decided to call it quits.
Cross compiler currently works in LinuxBIOS (we routinely use it on amd64)
so I don't expect problems compile testing the ppc code, as soon as I have
built a cross compiler.
Our dependency information is currently atrocious. Ideally abuild would allow
the dependencies to prevent us from rebuilding any port that has built successfully
when none of it's dependencies have changed. Unfortunately we don't generate
those properly, and abuild.sh is not quite smart enough yet to take advantage of
dependencies even if we properly generated them. This is something to put
on the wishlist.
Anyway my checking comments are below.
Hopefully I have not gotten too spacey and missed something important.
Eric
- Update abuild.sh so it will rebuild successfull builds
- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
enabled. All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.
- Implemented failover.c on many ports where it was previously a stub.
CVS: ----------------------------------------------------------------------
CVS: Enter Log. Lines beginning with `CVS:' are removed automatically
CVS:
CVS: Committing in .
CVS:
CVS: Modified Files:
CVS: documentation/LinuxBIOS-AMD64.tex src/arch/i386/lib/Config.lb
CVS: src/arch/i386/lib/pci_ops.c src/boot/hardwaremain.c
CVS: src/config/Config.lb src/config/Options.lb
CVS: src/cpu/amd/socket_754/socket_754.c
CVS: src/cpu/amd/socket_940/socket_940.c
CVS: src/cpu/intel/slot_2/slot_2.c
CVS: src/cpu/intel/socket_mPGA479M/socket_mPGA479M.c
CVS: src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c
CVS: src/cpu/intel/socket_mPGA604_533Mhz/socket_mPGA604_533Mhz.c
CVS: src/cpu/intel/socket_mPGA604_800Mhz/socket_mPGA604_800Mhz.c
CVS: src/include/device/device.h src/include/device/pci_ops.h
CVS: src/mainboard/Iwill/DK8S2/Config.lb
CVS: src/mainboard/Iwill/DK8S2/auto.c
CVS: src/mainboard/Iwill/DK8S2/chip.h
CVS: src/mainboard/Iwill/DK8S2/cmos.layout
CVS: src/mainboard/Iwill/DK8S2/mainboard.c
CVS: src/mainboard/Iwill/DK8S2/mptable.c
CVS: src/mainboard/Iwill/DK8X/Config.lb
CVS: src/mainboard/Iwill/DK8X/auto.c
CVS: src/mainboard/Iwill/DK8X/chip.h
CVS: src/mainboard/Iwill/DK8X/cmos.layout
CVS: src/mainboard/Iwill/DK8X/mainboard.c
CVS: src/mainboard/Iwill/DK8X/mptable.c
CVS: src/mainboard/amd/quartet/Config.lb
CVS: src/mainboard/amd/quartet/auto.c
CVS: src/mainboard/amd/quartet/chip.h
CVS: src/mainboard/amd/quartet/mainboard.c
CVS: src/mainboard/amd/quartet/mptable.c
CVS: src/mainboard/amd/serenade/Config.lb
CVS: src/mainboard/amd/serenade/auto.c
CVS: src/mainboard/amd/serenade/chip.h
CVS: src/mainboard/amd/serenade/mainboard.c
CVS: src/mainboard/amd/serenade/mptable.c
CVS: src/mainboard/amd/solo/Config.lb
CVS: src/mainboard/amd/solo/mainboard.c
CVS: src/mainboard/arima/hdama/Config.lb
CVS: src/mainboard/arima/hdama/auto.c
CVS: src/mainboard/arima/hdama/cmos.layout
CVS: src/mainboard/arima/hdama/mainboard.c
CVS: src/mainboard/densitron/dpx114/Config.lb
CVS: src/mainboard/densitron/dpx114/auto.c
CVS: src/mainboard/densitron/dpx114/chip.h
CVS: src/mainboard/densitron/dpx114/failover.c
CVS: src/mainboard/densitron/dpx114/mainboard.c
CVS: src/mainboard/digitallogic/adl855pc/Config.lb
CVS: src/mainboard/digitallogic/adl855pc/auto.c
CVS: src/mainboard/digitallogic/adl855pc/chip.h
CVS: src/mainboard/digitallogic/adl855pc/failover.c
CVS: src/mainboard/digitallogic/adl855pc/mainboard.c
CVS: src/mainboard/emulation/qemu-i386/auto.c
CVS: src/mainboard/emulation/qemu-i386/mainboard.c
CVS: src/mainboard/ibm/e325/Config.lb
CVS: src/mainboard/ibm/e325/Options.lb
CVS: src/mainboard/ibm/e325/auto.c src/mainboard/ibm/e325/chip.h
CVS: src/mainboard/ibm/e325/mainboard.c
CVS: src/mainboard/ibm/e325/mptable.c
CVS: src/mainboard/newisys/khepri/Config.lb
CVS: src/mainboard/newisys/khepri/auto.c
CVS: src/mainboard/newisys/khepri/chip.h
CVS: src/mainboard/newisys/khepri/mainboard.c
CVS: src/mainboard/newisys/khepri/mptable.c
CVS: src/mainboard/technologic/ts5300/Config.lb
CVS: src/mainboard/technologic/ts5300/mainboard.c
CVS: src/mainboard/tyan/s2735/mainboard.c
CVS: src/mainboard/tyan/s2850/mainboard.c
CVS: src/mainboard/tyan/s2880/mainboard.c
CVS: src/mainboard/tyan/s2881/mainboard.c
CVS: src/mainboard/tyan/s2882/auto.c
CVS: src/mainboard/tyan/s2882/mainboard.c
CVS: src/mainboard/tyan/s2885/mainboard.c
CVS: src/mainboard/tyan/s4880/auto.c
CVS: src/mainboard/tyan/s4880/mainboard.c
CVS: src/mainboard/tyan/s4882/mainboard.c
CVS: src/mainboard/via/epia/Config.lb src/mainboard/via/epia/auto.c
CVS: src/mainboard/via/epia/failover.c
CVS: src/mainboard/via/epia/mainboard.c
CVS: src/mainboard/via/epia-m/Config.lb
CVS: src/mainboard/via/epia-m/auto.c
CVS: src/mainboard/via/epia-m/chip.h
CVS: src/mainboard/via/epia-m/failover.c
CVS: src/mainboard/via/epia-m/mainboard.c
CVS: src/northbridge/amd/amdk8/northbridge.c
CVS: src/northbridge/emulation/qemu-i386/northbridge.c
CVS: src/northbridge/intel/e7501/northbridge.c
CVS: src/northbridge/intel/i855pm/northbridge.c
CVS: src/northbridge/intel/i855pm/raminit.c
CVS: src/northbridge/transmeta/tm5800/northbridge.c
CVS: src/northbridge/via/vt8601/northbridge.c
CVS: src/northbridge/via/vt8623/northbridge.c
CVS: src/northbridge/via/vt8623/raminit.c
CVS: src/southbridge/amd/amd8111/amd8111.c
CVS: src/southbridge/intel/i82801dbm/i82801dbm.c
CVS: src/southbridge/intel/i82801er/i82801er.c
CVS: src/southbridge/ricoh/rl5c476/rl5c476.c
CVS: src/southbridge/via/vt8231/vt8231.c
CVS: src/southbridge/via/vt8235/vt8235.c
CVS: src/superio/NSC/pc87360/superio.c
CVS: src/superio/NSC/pc87366/chip.h
CVS: src/superio/NSC/pc87366/superio.c
CVS: src/superio/NSC/pc97307/superio.c
CVS: src/superio/via/vt1211/vt1211.c
CVS: src/superio/winbond/w83627hf/superio.c
CVS: src/superio/winbond/w83627hf/w83627hf.h
CVS: src/superio/winbond/w83627hf/w83627hf_early_serial.c
CVS: src/superio/winbond/w83627thf/chip.h
CVS: src/superio/winbond/w83627thf/superio.c util/abuild/abuild.sh
CVS: Added Files:
CVS: src/arch/i386/include/arch/pci_ops.h
CVS: src/arch/i386/lib/pci_ops_auto.c
CVS: src/arch/i386/lib/pci_ops_conf1.c
CVS: src/arch/i386/lib/pci_ops_conf2.c
CVS: src/arch/ppc/include/arch/pci_ops.h
CVS: src/mainboard/Iwill/DK8S2/Options.lb
CVS: src/mainboard/Iwill/DK8X/Options.lb
CVS: src/mainboard/densitron/dpx114/Options.lb
CVS: src/mainboard/digitallogic/adl855pc/Options.lb
CVS: src/mainboard/via/epia-m/Options.lb
CVS: ----------------------------------------------------------------------
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