[BULK] Re: [LinuxBIOS] Re: ROMCC bug
yinghailu at gmail.com
Tue Jun 21 01:23:20 CEST 2005
AMD i have tried c0 and Ex.
On 6/20/05, Eric W. Biederman <ebiederman at lnxi.com> wrote:
> yhlu <yinghailu at gmail.com> writes:
> > So we must make cache_as_ram work on other 86 platform besides amd cpu...
> It is a good idea and for new cpus it is probably an option.
> For people in the embedded space we still need romcc.
> > Is there any intel public doc about using cache_as_ram?
> I have not seen any yet which is a puzzle. For the first round
> of Intel cpus that supported it you had to load a microcode update,
> before it would work. I have yet to see if AMD's flavor will work
> on k8 revisions B3, C0, CG, Ex. I expect it will but I have been
> burnt too many times.
> > I have tried amd cache_as_ram in intel platform, it seem if access
> > some position several times, the contents of that address will become
> > to 0xff....
> Exactly the problem. If you aren't using a supported flavor of cache
> as ram it fails more often and in less predictable ways than romcc.
> That is why I avoid it unless the manufacturer supports it. And that
> is why we cannot decompress and run code out of the cache.
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