[LinuxBIOS] LNXI Merge: lnxi-patch-15/16

Lu, Yinghai yinghai.lu at amd.com
Sat Sep 3 00:26:56 CEST 2005


Any reason for you disabling Cache as RAM for Tyan MB?

YH



-----Original Message-----
From: linuxbios-bounces at openbios.org
[mailto:linuxbios-bounces at openbios.org] On Behalf Of jason schildt
Sent: Friday, September 02, 2005 3:04 PM
To: linuxbios at openbios.org
Subject: [LinuxBIOS] LNXI Merge: lnxi-patch-15/16

DESCRIPTION:
------------------------------------------------

## lnxi-patch-15 ##
src/mainboard/.../Options.lb
	Disabled cache_as_ram:  USE_CACHE_RAM  CONFIG_USE_INIT
		tyan/s2881/Options.lb
		tyan/s2882/Options.lb
		tyan/s2891/Options.lb
		tyan/s4880/Options.lb
		tyan/s2892/Options.lb
		tyan/s2875/Options.lb
		tyan/s4882/Options.lb
		tyan/s2885/Options.lb
		tyan/s2895/Options.lb


DIFFSTAT:
------------------------------------------------

s2875/Options.lb |    4 ++--
  s2881/Options.lb |    4 ++--
  s2882/Options.lb |    4 ++--
  s2885/Options.lb |    4 ++--
  s2891/Options.lb |    4 ++--
  s2892/Options.lb |    4 ++--
  s2895/Options.lb |    4 ++--
  s4880/Options.lb |    4 ++--
  s4882/Options.lb |    4 ++--
  9 files changed, 18 insertions(+), 18 deletions(-)



PATCH:
------------------------------------------------

Index: s2881/Options.lb
===================================================================
--- s2881/Options.lb	(revision 1105)
+++ s2881/Options.lb	(working copy)
@@ -130,10 +130,10 @@
  ##
  ## enable CACHE_AS_RAM specifics
  ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
  default DCACHE_RAM_BASE=0xcf000
  default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0

  ##
  ## Build code to setup a generic IOAPIC
Index: s2882/Options.lb
===================================================================
--- s2882/Options.lb	(revision 1105)
+++ s2882/Options.lb	(working copy)
@@ -130,10 +130,10 @@
  ##
  ## enable CACHE_AS_RAM specifics
  ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
  default DCACHE_RAM_BASE=0xcf000
  default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0

  ##
  ## Build code to setup a generic IOAPIC
Index: s2891/Options.lb
===================================================================
--- s2891/Options.lb	(revision 1105)
+++ s2891/Options.lb	(working copy)
@@ -139,10 +139,10 @@
  ##
  ## enable CACHE_AS_RAM specifics
  ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
  default DCACHE_RAM_BASE=0xcf000
  default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0


  ##
Index: s4880/Options.lb
===================================================================
--- s4880/Options.lb	(revision 1105)
+++ s4880/Options.lb	(working copy)
@@ -130,10 +130,10 @@
  ##
  ## enable CACHE_AS_RAM specifics
  ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
  default DCACHE_RAM_BASE=0xcf000
  default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0

  ##
  ## Build code to setup a generic IOAPIC
Index: s2892/Options.lb
===================================================================
--- s2892/Options.lb	(revision 1105)
+++ s2892/Options.lb	(working copy)
@@ -139,10 +139,10 @@
  ##
  ## enable CACHE_AS_RAM specifics
  ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
  default DCACHE_RAM_BASE=0xcf000
  default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0


  ##
Index: s2875/Options.lb
===================================================================
--- s2875/Options.lb	(revision 1105)
+++ s2875/Options.lb	(working copy)
@@ -130,10 +130,10 @@
  ##
  ## enable CACHE_AS_RAM specifics
  ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
  default DCACHE_RAM_BASE=0xcf000
  default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0

  ##
  ## Build code to setup a generic IOAPIC
Index: s4882/Options.lb
===================================================================
--- s4882/Options.lb	(revision 1105)
+++ s4882/Options.lb	(working copy)
@@ -130,10 +130,10 @@
  ##
  ## enable CACHE_AS_RAM specifics
  ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
  default DCACHE_RAM_BASE=0xcf000
  default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0

  ##
  ## Build code to setup a generic IOAPIC
Index: s2885/Options.lb
===================================================================
--- s2885/Options.lb	(revision 1105)
+++ s2885/Options.lb	(working copy)
@@ -130,10 +130,10 @@
  ##
  ## enable CACHE_AS_RAM specifics
  ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
  default DCACHE_RAM_BASE=0xcf000
  default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0

  ##
  ## Build code to setup a generic IOAPIC
Index: s2895/Options.lb
===================================================================
--- s2895/Options.lb	(revision 1105)
+++ s2895/Options.lb	(working copy)
@@ -136,10 +136,10 @@
  ##
  ## enable CACHE_AS_RAM specifics
  ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
  default DCACHE_RAM_BASE=0xcf000
  default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0

  ##
  ## Build code to setup a generic IOAPIC



-- 
Jason W. Schildt
LinuxBIOS Software Engineer
Linux Networx

-- 
LinuxBIOS mailing list
LinuxBIOS at openbios.org
http://www.openbios.org/mailman/listinfo/linuxbios






More information about the coreboot mailing list