[LinuxBIOS] SPD as debug channel
segher at kernel.crashing.org
Fri Dec 1 23:21:15 CET 2006
> The assumption was that not much needs to happen before the SPD I2C
> bus is accessible by the CPU - is that valid?
Depends on the system. Intel tends to put the I2C controllers
on the south bridge, such a shame.
> If not, what IS easily accessible besides the boot ROM?
In general? Nothing, not necessarily the boot ROM even!
>> LPC is going away on many boards, I understand.
> But DDR(2) SDRAM will probably stay a while longer. Or not?
That is the nice thing about the DIMM serial: memory modules
will keep using I2C SPD eeproms for the foreseeable future,
and (almost) every board uses DIMMs.
>> I think that we are going into a world where we have to figure out
>> usb debug port.
> It's certainly one good debugging option but maybe not the only good
And *all* these options require special (extra) debug hardware,
no good for the end user.
>> I don't think that the PCI initial setup for USB debug is going to
>> be impossible -- the vendors have to debug these boards too. All
>> the boards I have used lately have a very straightforward path to
>> USB, that could be set up in the ROMCC or CAR code.
> I think it should be fairly simple on x86 too, but we would also like
> more exotic systems in v3 so exploring other options is good.
> (And fun!)
It can't be done in a generic way. That doesn't matter of course,
the CAR code by very nature isn't generic. It might require our
CAR code to be more board-specific than we want though (although
perhaps (some of) it can be parametrised in the DT).
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