[LinuxBIOS] 440BX progress.

ron minnich rminnich at gmail.com
Sun Dec 3 05:00:27 CET 2006


On 12/2/06, Segher Boessenkool <segher at kernel.crashing.org> wrote:

> >  * The v1 code seems to read from the highest RAM address for each DRB
> >    register.
>
> You need to do this init sequence for every rank of
> memory.  Using each DRB gives you a lot of duplicates,
> which can be harmless; it can also give you 0 as the
> top-of-rank address (if the first ranks are empty)
> which is bad.

no, not really duplicates, I think. You set up the DRBs for max size,
you do all the DRAM setup, you size the actual RAM and reprogram the
DRBs. This will work even if there is air in the socket. It ensures
that a single DRB does not hit the same DRAM bank.

ron




More information about the coreboot mailing list