[LinuxBIOS] 64 bit pref mem patch for ck804

Stefan Reinauer stepan at coresystems.de
Sat Nov 4 16:51:44 CET 2006


* Lu, Yinghai <yinghai.lu at amd.com> [061104 03:31]:
> 
> Myles,
> 
> I can not commit the patch directly, So please apply that in your own tree.

Is a similar patch required for amd 8xxx?


Content-Description: ck804_64bit_pref_mem.diff
> ck804 64bit pref mem support
> 
> Signed-off-by: Yinghai Lu <yinghai.lu at amd.com>

Acked-by: Stefan Reinauer <stepan at coresystems.de>

> 
> Index: ck804_pci.c
> ===================================================================
> --- ck804_pci.c	(revision 2486)
> +++ ck804_pci.c	(working copy)
> @@ -14,6 +14,10 @@
>  {
>  
>  	uint32_t dword;
> +#if CONFIG_PCI_64BIT_PREF_MEM == 1
> +	device_t pci_domain_dev;
> +	struct resource *mem1, *mem2;
> +#endif
>  	
>  	/* System error enable */
>  	dword = pci_read_config32(dev, 0x04);
> @@ -34,8 +38,27 @@
>          pci_write_config32(dev, 0x4c, dword);
>  #endif
>  
> +#if CONFIG_PCI_64BIT_PREF_MEM == 1
> +	pci_domain_dev = dev->bus->dev;
> +	while(pci_domain_dev) {
> +		if(pci_domain_dev->path.type == DEVICE_PATH_PCI_DOMAIN) break;
> +		pci_domain_dev = pci_domain_dev->bus->dev;
> +	}
> +
> +	if(!pci_domain_dev) return; // impossiable

It should read "impossible" or better "impossible because we need a PCI domain"

but how can we end up without a pci domain on a ck804 mainboard? I would
think this can only happen if the mainboard config file is wrong?

> +	mem1 = find_resource(pci_domain_dev, 1); // prefmem, it could be 64bit
> +	mem2 = find_resource(pci_domain_dev, 2); // mem
> +	if(mem1->base > mem2->base) {
> +		dword = mem2->base  & (0xffff0000UL);
> +		printk_debug("PCI DOMAIN mem2 base = 0x%010Lx\n", mem2->base);
> +	} else {
> +		dword = mem1->base  & (0xffff0000UL);
> +		printk_debug("PCI DOMAIN mem1 (prefmem) base = 0x%010Lx\n", mem1->base);
> +	}
> +#else
>  	dword = dev_root.resource[1].base & (0xffff0000UL);
> -	printk_debug("dev_root mem base = 0x%010Lx\n", dev_root.resource[1].base);	
> +	printk_debug("dev_root mem base = 0x%010Lx\n", dev_root.resource[1].base);
> +#endif
>  
>  	printk_debug("[0x50] <-- 0x%08x\n", dword);
>          pci_write_config32(dev, 0x50, dword); //TOM


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