ben at hewson-venieri.com
Tue Nov 28 18:17:53 CET 2006
Corey Osgood wrote:
> Tyler Pohl wrote:
>> I see the epia is "Broken". No wonder I could never get it to work
>> properly. Is anyone ever going to get this to work? What's broken
>> anyhow? I know the processor is missing the CMOV instruction.
>> Tyler Pohl
> Take a peak at the northbridge (vt1211?) code, ram initialization isn't
> working correctly (not sure if it's in getting the spd data or setting
> the registers correctly). The last person to work on it patched it up to
> work on his specific configuration, but it needs work to work on a more
> generic basis (ie different ram configurations).
The main problem with the EPIA board is that ROMCC misses the next line
after any #if or #else directive with a C++ style comment when
compiling. It may also miss the line after a #endif as well, I didn't
check that. There are quite a few in raminit.c that set various
registers. Needless to say missing lines of code is not good.
If you either take out the C++ comments or change them to standard C
comments the raminit does mostly work.
There are some problems which I havent got to the bottom of yet.
Firstly the first spd read nearly always fails. It doesnt matter so much
as it is in a function that tries to automatically set the memory timing
registers, but it doesnt actually set anything, the code is commented out.
Secondly sometimes the system will just hang while doing SPD stuff. Now
there are timeouts in all functions that could hang, so I am not sure
what is going on there. Possibly something with either the northbridge
or southbridge is not setup quite right.
Other than that I have my board booting linux using filo.
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